X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fvm%2Fjit%2Fx86_64%2Farch.h;h=ff74f82bbc5847bc9f75646066230cba39778139;hb=735bdda890a385d1fa9cc532faadbbc96f2d1218;hp=57ac2e2ee09cab42e20c1d2b0f6dd9123dbc142f;hpb=569dd363a0e4190994ef86e4314bb95aed3f5f01;p=cacao.git diff --git a/src/vm/jit/x86_64/arch.h b/src/vm/jit/x86_64/arch.h index 57ac2e2ee..ff74f82bb 100644 --- a/src/vm/jit/x86_64/arch.h +++ b/src/vm/jit/x86_64/arch.h @@ -1,9 +1,7 @@ /* src/vm/jit/x86_64/arch.h - architecture defines for x86_64 - Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates, - R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner, - C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger, - Institut f. Computersprachen - TU Wien + Copyright (C) 1996-2008, 2009 + CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO This file is part of CACAO. @@ -19,143 +17,117 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - 02111-1307, USA. + Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + 02110-1301, USA. - Contact: cacao@complang.tuwien.ac.at +*/ - Authors: Christian Thalinger - Changes: +#ifndef _ARCH_H +#define _ARCH_H - $Id: arch.h 2413 2005-04-29 18:54:31Z twisti $ +#define JIT_COMPILER_VIA_SIGNAL -*/ +#include "config.h" -#ifndef _ARCH_H -#define _ARCH_H +/* define architecture features ***********************************************/ +#define SUPPORT_DIVISION 1 +#define SUPPORT_LONG 1 -/* define registers ***********************************************************/ +#define SUPPORT_I2F 1 +#define SUPPORT_I2D 1 +#define SUPPORT_L2F 1 +#define SUPPORT_L2D 1 -#define RIP -1 -#define RAX 0 -#define RCX 1 -#define RDX 2 -#define RBX 3 -#define RSP 4 -#define RBP 5 -#define RSI 6 -#define RDI 7 -#define R8 8 -#define R9 9 -#define R10 10 -#define R11 11 -#define R12 12 -#define R13 13 -#define R14 14 -#define R15 15 +/* ATTENTION: x86_64 architectures support these conversions, but we + need the builtin functions in corner cases */ +#define SUPPORT_F2I 0 +#define SUPPORT_F2L 0 +#define SUPPORT_D2I 0 +#define SUPPORT_D2L 0 +#define SUPPORT_LONG_ADD 1 +#define SUPPORT_LONG_CMP 1 +#define SUPPORT_LONG_CMP_CONST 1 +#define SUPPORT_LONG_LOGICAL 1 +#define SUPPORT_LONG_SHIFT 1 +#define SUPPORT_LONG_MUL 1 +#define SUPPORT_LONG_DIV 1 -#define XMM0 0 -#define XMM1 1 -#define XMM2 2 -#define XMM3 3 -#define XMM4 4 -#define XMM5 5 -#define XMM6 6 -#define XMM7 7 -#define XMM8 8 -#define XMM9 9 -#define XMM10 10 -#define XMM11 11 -#define XMM12 12 -#define XMM13 13 -#define XMM14 14 -#define XMM15 15 +#define SUPPORT_LONG_DIV_POW2 1 +#define SUPPORT_LONG_REM_POW2 1 +#define SUPPORT_CONST_LOGICAL 1 /* AND, OR, XOR with immediates */ +#define SUPPORT_CONST_MUL 1 /* mutiply with immediate */ -/* preallocated registers *****************************************************/ +#define SUPPORT_CONST_STORE 1 /* do we support const stores */ +#define SUPPORT_CONST_STORE_ZERO_ONLY 0 /* on some risc machines we can */ + /* only store REG_ZERO */ -/* integer registers */ - -#define REG_RESULT RAX /* to deliver method results */ -#define REG_ITMP1 RAX /* temporary register */ -#define REG_ITMP2 R10 /* temporary register and method pointer */ -#define REG_ITMP3 R11 /* temporary register */ +/* float **********************************************************************/ -#define REG_NULL -1 /* used for reg_of_var where d is not needed */ +#define SUPPORT_FLOAT 1 -#define REG_ITMP1_XPTR RAX /* exception pointer = temporary register 1 */ -#define REG_ITMP2_XPC R10 /* exception pc = temporary register 2 */ +#if defined(ENABLE_SOFT_FLOAT_CMP) +# define SUPPORT_FLOAT_CMP 0 +#else +# define SUPPORT_FLOAT_CMP 1 +#endif -#define REG_SP RSP /* stack pointer */ -/* floating point registers */ +/* double *********************************************************************/ -#define REG_FRESULT XMM0 /* to deliver floating point method results */ +#define SUPPORT_DOUBLE 1 -#define REG_FTMP1 XMM8 /* temporary floating point register */ -#define REG_FTMP2 XMM9 /* temporary floating point register */ -#define REG_FTMP3 XMM10 /* temporary floating point register */ +#if defined(ENABLE_SOFT_FLOAT_CMP) +# define SUPPORT_DOUBLE_CMP 0 +#else +# define SUPPORT_DOUBLE_CMP 1 +#endif -#define INT_REG_CNT 16 /* number of integer registers */ -#define INT_SAV_CNT 5 /* number of integer callee saved registers */ -#define INT_ARG_CNT 6 /* number of integer argument registers */ -#define INT_TMP_CNT 1 /* number of integer temporary registers */ -#define INT_RES_CNT 3 /* number of integer reserved registers */ +#define CONSECUTIVE_INTEGER_ARGS +#define CONSECUTIVE_FLOAT_ARGS -#define FLT_REG_CNT 16 /* number of float registers */ -#define FLT_SAV_CNT 0 /* number of float callee saved registers */ -#define FLT_ARG_CNT 8 /* number of float argument registers */ -#define FLT_TMP_CNT 5 /* number of float temporary registers */ -#define FLT_RES_CNT 3 /* number of float reserved registers */ -#define TRACE_ARGS_NUM 6 +/* branches *******************************************************************/ +#define SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER 1 +#define SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER 0 +#define SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS 0 +#define SUPPORT_BRANCH_CONDITIONAL_UNSIGNED_CONDITIONS 1 -/* define architecture features ***********************************************/ -#define POINTERSIZE 8 -#define WORDS_BIGENDIAN 0 +/* exceptions *****************************************************************/ -#define U8_AVAILABLE 1 +#define SUPPORT_HARDWARE_DIVIDE_BY_ZERO 1 -#define USE_CODEMMAP 1 -/* #define USEBUILTINTABLE */ +/* stackframe *****************************************************************/ -#define SUPPORT_DIVISION 1 -#define SUPPORT_LONG 1 -#define SUPPORT_FLOAT 1 -#define SUPPORT_DOUBLE 1 -/* #define SUPPORT_FMOD 1 */ -/* #define SUPPORT_IFCVT 1 */ -/* #define SUPPORT_FICVT 1 */ +#define STACKFRMAE_RA_BETWEEN_FRAMES 1 +#define STACKFRAME_RA_TOP_OF_FRAME 0 +#define STACKFRAME_RA_LINKAGE_AREA 0 +#define STACKFRAME_LEAFMETHODS_RA_REGISTER 0 +#define STACKFRAME_SYNC_NEEDS_TWO_SLOTS 0 -#define SUPPORT_LONG_ADD 1 -#define SUPPORT_LONG_CMP 1 -#define SUPPORT_LONG_LOGICAL 1 -#define SUPPORT_LONG_SHIFT 1 -#define SUPPORT_LONG_MUL 1 -#define SUPPORT_LONG_DIV 1 -#define SUPPORT_LONG_ICVT 1 -#define SUPPORT_LONG_FCVT 1 -#define SUPPORT_CONST_LOGICAL 1 /* AND, OR, XOR with immediates */ -#define SUPPORT_CONST_MUL 1 /* mutiply with immediate */ +/* replacement ****************************************************************/ -#define SUPPORT_CONST_STORE 0 /* do we support const stores */ -#define SUPPORT_CONST_STORE_ZERO_ONLY 0 /* on some risc machines we can */ - /* only store REG_ZERO */ +#define REPLACEMENT_PATCH_SIZE 2 /* bytes */ -#define CONDITIONAL_LOADCONST 1 +/* subtype ********************************************************************/ -#define CONSECUTIVE_INTEGER_ARGS -#define CONSECUTIVE_FLOAT_ARGS +#define USES_NEW_SUBTYPE 1 + +/* memory barriers ************************************************************/ + +#define CAS_PROVIDES_FULL_BARRIER 1 + +#define USES_PATCHABLE_MEMORY_BARRIER 1 #endif /* _ARCH_H */ @@ -171,4 +143,5 @@ * c-basic-offset: 4 * tab-width: 4 * End: + * vim:noexpandtab:sw=4:ts=4: */