X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fvm%2Fjit%2Fs390%2Femit.c;h=e395099dc077e9123a0fe3cf861017998e1a6e65;hb=ac822cd13dc1a39b128ec99771972139fabbb3a1;hp=adc1c2d6b791d2b881343d45846fcdc910ff6da1;hpb=9aa0cde21c43ce08b97854c2b56b34d076eb315d;p=cacao.git diff --git a/src/vm/jit/s390/emit.c b/src/vm/jit/s390/emit.c index adc1c2d6b..e395099dc 100644 --- a/src/vm/jit/s390/emit.c +++ b/src/vm/jit/s390/emit.c @@ -1,9 +1,7 @@ /* src/vm/jit/s390/emit.c - s390 code emitter functions - Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel, - C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring, - E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, - J. Wenninger, Institut f. Computersprachen - TU Wien + Copyright (C) 1996-2005, 2006, 2007, 2008 + CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO This file is part of CACAO. @@ -22,39 +20,37 @@ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - $Id: emit.c 8027 2007-06-07 10:30:33Z michi $ - */ - #include "config.h" #include - -#include "vm/types.h" - -#include "md-abi.h" +#include #include "vm/jit/s390/codegen.h" #include "vm/jit/s390/emit.h" +#include "vm/jit/s390/md-abi.h" + +#include "mm/memory.h" -#if defined(ENABLE_THREADS) -# include "threads/native/lock.h" -#endif +#include "threads/lock-common.h" #include "vm/builtin.h" +#include "vm/global.h" +#include "vm/types.h" +#include "vm/options.h" + +#include "vm/jit/abi.h" #include "vm/jit/abi-asm.h" #include "vm/jit/asmpart.h" #include "vm/jit/codegen-common.h" #include "vm/jit/emit-common.h" -#include "vm/jit/jit.h" +#include "vm/jit/jit.hpp" +#include "vm/jit/patcher-common.h" #include "vm/jit/replace.h" -#include "vm/jit/abi.h" -#include "vm/global.h" -#include "mm/memory.h" -#include "vm/exceptions.h" +#include "vm/jit/trace.hpp" +#include "vm/jit/trap.h" -#define __PORTED__ /* emit_load ******************************************************************* @@ -62,7 +58,7 @@ *******************************************************************************/ -__PORTED__ s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg) +s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg) { codegendata *cd; s4 disp; @@ -75,7 +71,7 @@ __PORTED__ s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg if (IS_INMEMORY(src->flags)) { COUNT_SPILLS; - disp = src->vv.regoff * 4; + disp = src->vv.regoff; if (IS_FLT_DBL_TYPE(src->type)) { if (IS_2_WORD_TYPE(src->type)) @@ -108,7 +104,7 @@ __PORTED__ s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg *******************************************************************************/ -__PORTED__ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d) +void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d) { codegendata *cd; @@ -121,15 +117,15 @@ __PORTED__ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, if (IS_FLT_DBL_TYPE(dst->type)) { if (IS_2_WORD_TYPE(dst->type)) - M_DST(d, REG_SP, dst->vv.regoff * 4); + M_DST(d, REG_SP, dst->vv.regoff); else - M_FST(d, REG_SP, dst->vv.regoff * 4); + M_FST(d, REG_SP, dst->vv.regoff); } else { if (IS_2_WORD_TYPE(dst->type)) - M_LST(d, REG_SP, dst->vv.regoff * 4); + M_LST(d, REG_SP, dst->vv.regoff); else - M_IST(d, REG_SP, dst->vv.regoff * 4); + M_IST(d, REG_SP, dst->vv.regoff); } } } @@ -141,7 +137,7 @@ __PORTED__ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, *******************************************************************************/ -__PORTED__ void emit_copy(jitdata *jd, instruction *iptr) +void emit_copy(jitdata *jd, instruction *iptr) { codegendata *cd; varinfo *src; @@ -165,254 +161,80 @@ __PORTED__ void emit_copy(jitdata *jd, instruction *iptr) return; } - /* If one of the variables resides in memory, we can eliminate - the register move from/to the temporary register with the - order of getting the destination register and the load. */ - - if (IS_INMEMORY(src->flags)) { - if (IS_FLT_DBL_TYPE(dst->type)) { - d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1); + if (IS_INMEMORY(src->flags) && IS_INMEMORY(dst->flags)) { + if (IS_2_WORD_TYPE(src->type)) { + N_MVC(dst->vv.regoff, 8, REG_SP, src->vv.regoff, REG_SP); } else { - if (IS_2_WORD_TYPE(dst->type)) { - d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED); + N_MVC(dst->vv.regoff, 4, REG_SP, src->vv.regoff, REG_SP); + } + } else { + + /* If one of the variables resides in memory, we can eliminate + the register move from/to the temporary register with the + order of getting the destination register and the load. */ + + if (IS_INMEMORY(src->flags)) { + if (IS_FLT_DBL_TYPE(dst->type)) { + d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1); } else { - d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1); + if (IS_2_WORD_TYPE(dst->type)) { + d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED); + } else { + d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1); + } } + s1 = emit_load(jd, iptr, src, d); } - s1 = emit_load(jd, iptr, src, d); - } - else { - if (IS_FLT_DBL_TYPE(src->type)) { - s1 = emit_load(jd, iptr, src, REG_FTMP1); - } else { - if (IS_2_WORD_TYPE(src->type)) { - s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED); + else { + if (IS_FLT_DBL_TYPE(src->type)) { + s1 = emit_load(jd, iptr, src, REG_FTMP1); } else { - s1 = emit_load(jd, iptr, src, REG_ITMP1); + if (IS_2_WORD_TYPE(src->type)) { + s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED); + } else { + s1 = emit_load(jd, iptr, src, REG_ITMP1); + } } + d = codegen_reg_of_var(iptr->opc, dst, s1); } - d = codegen_reg_of_var(iptr->opc, dst, s1); - } - if (s1 != d) { - if (IS_FLT_DBL_TYPE(src->type)) { - M_FMOV(s1, d); - } else { - if (IS_2_WORD_TYPE(src->type)) { - M_LNGMOVE(s1, d); + if (s1 != d) { + if (IS_FLT_DBL_TYPE(src->type)) { + M_FMOV(s1, d); } else { - M_MOV(s1, d); + if (IS_2_WORD_TYPE(src->type)) { + M_LNGMOVE(s1, d); + } else { + M_MOV(s1, d); + } } } - } - - emit_store(jd, iptr, dst, d); - } -} - - -/* emit_patcher_stubs ********************************************************** - Generates the code for the patcher stubs. - -*******************************************************************************/ - -__PORTED__ void emit_patcher_stubs(jitdata *jd) -{ - - codegendata *cd; - patchref *pref; - u4 mcode; - u1 *savedmcodeptr; - u1 *tmpmcodeptr; - s4 targetdisp; - s4 disp; - u1 *ref; - - /* get required compiler data */ - - cd = jd->cd; - - /* generate code patching stub call code */ - - targetdisp = 0; - - for (pref = cd->patchrefs; pref != NULL; pref = pref->next) { - /* check code segment size */ - - MCODECHECK(100); - - /* Get machine code which is patched back in later. The - call is 1 instruction word long. */ - - tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos); - - mcode = *((u4 *) tmpmcodeptr); - - /* Patch in the call to call the following code (done at - compile time). */ - - savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */ - cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */ - - disp = (savedmcodeptr) - (tmpmcodeptr); - - if (! N_VALID_BRANCH(disp)) { - /* Displacement overflow */ - - /* If LONGBRANCHES is not set, the flag and the error flag */ - - if (! CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) { - cd->flags |= (CODEGENDATA_FLAG_ERROR | - CODEGENDATA_FLAG_LONGBRANCHES); - } - - /* If error flag is set, do nothing. The method has to be recompiled. */ - - if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) { - return; - } - } - - if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) { - - /* Generating long branches */ - - disp = dseg_add_s4(cd, savedmcodeptr - cd->mcodebase); - - M_ILD(REG_ITMP3, REG_PV, disp); - M_AADD(REG_PV, REG_ITMP3); - - /* Do the branch at the end of NOP sequence. - * This way the patch position is at a *fixed* offset - * (PATCHER_LONGBRANCHES_NOPS_SKIP) of the return address. - */ - - cd->mcodeptr = tmpmcodeptr + PATCHER_LONGBRANCHES_NOPS_SKIP - SZ_BASR; - M_JMP(REG_ITMP3, REG_ITMP3); - } else { - - /* Generating short branches */ - - M_BSR(REG_ITMP3, disp); - } - - cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */ - - /* create stack frame */ - - M_ASUB_IMM(6 * 4, REG_SP); - - /* move return address onto stack */ - - M_AST(REG_ITMP3, REG_SP, 5 * 4); - - /* move pointer to java_objectheader onto stack */ - -#if defined(ENABLE_THREADS) - /* create a virtual java_objectheader */ - - (void) dseg_add_unique_address(cd, NULL); /* flcword */ - (void) dseg_add_unique_address(cd, lock_get_initial_lock_word()); - disp = dseg_add_unique_address(cd, NULL); /* vftbl */ - - M_LDA(REG_ITMP3, REG_PV, disp); - M_AST(REG_ITMP3, REG_SP, 4 * 4); -#else - /* nothing to do */ -#endif - - /* move machine code onto stack */ - - disp = dseg_add_s4(cd, mcode); - M_ILD(REG_ITMP3, REG_PV, disp); - M_IST(REG_ITMP3, REG_SP, 3 * 4); - - /* move class/method/field reference onto stack */ - - disp = dseg_add_address(cd, pref->ref); - M_ALD(REG_ITMP3, REG_PV, disp); - M_AST(REG_ITMP3, REG_SP, 2 * 4); - - /* move data segment displacement onto stack */ - - disp = dseg_add_s4(cd, pref->disp); - M_ILD(REG_ITMP3, REG_PV, disp); - M_IST(REG_ITMP3, REG_SP, 1 * 4); - - /* move patcher function pointer onto stack */ - - disp = dseg_add_functionptr(cd, pref->patcher); - M_ALD(REG_ITMP3, REG_PV, disp); - M_AST(REG_ITMP3, REG_SP, 0 * 4); - - if (targetdisp == 0) { - targetdisp = (cd->mcodeptr) - (cd->mcodebase); - - disp = dseg_add_functionptr(cd, asm_patcher_wrapper); - M_ALD(REG_ITMP3, REG_PV, disp); - M_JMP(RN, REG_ITMP3); - } - else { - disp = ((cd->mcodebase) + targetdisp) - - (( cd->mcodeptr) ); - - emit_branch(cd, disp, BRANCH_UNCONDITIONAL, RN, 0); + emit_store(jd, iptr, dst, d); } } } +/* emit_trap ******************************************************************* -/* emit_replacement_stubs ****************************************************** - - Generates the code for the replacement stubs. + Emit a trap instruction and return the original machine code. *******************************************************************************/ -void emit_replacement_stubs(jitdata *jd) +uint32_t emit_trap(codegendata *cd) { -#if 0 - codegendata *cd; - codeinfo *code; - rplpoint *rplp; - s4 disp; - s4 i; - - /* get required compiler data */ - - cd = jd->cd; - code = jd->code; - - rplp = code->rplpoints; - - for (i = 0; i < code->rplpointcount; ++i, ++rplp) { - /* check code segment size */ + uint32_t mcode; - MCODECHECK(512); + /* Get machine code which is patched back in later. The + trap is 2 bytes long. */ - /* note start of stub code */ + mcode = *((u2 *) cd->mcodeptr); - rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase); + M_ILL(TRAP_PATCHER); - /* make machine code for patching */ - - disp = (ptrint) (rplp->outcode - rplp->pc) - 5; - - rplp->mcode = 0xe9 | ((u8) disp << 8); - - /* push address of `rplpoint` struct */ - - M_MOV_IMM(rplp, REG_ITMP3); - M_PUSH(REG_ITMP3); - - /* jump to replacement function */ - - M_MOV_IMM(asm_replacement_out, REG_ITMP3); - M_JMP(REG_ITMP3); - } -#endif + return mcode; } - + /* emit_verbosecall_enter ****************************************************** @@ -423,178 +245,157 @@ void emit_replacement_stubs(jitdata *jd) #if !defined(NDEBUG) void emit_verbosecall_enter(jitdata *jd) { - methodinfo *m; + codeinfo *code; codegendata *cd; methoddesc *md; - s4 i, j, k; - s4 stackframesize, off, foff, aoff, doff, t, iargctr, fargctr, disp; + s4 stackframesize; + s4 i, off, disp, s; - /* get required compiler data */ - - m = jd->m; - cd = jd->cd; + m = jd->m; + code = jd->code; + cd = jd->cd; - md = m->parseddesc; + md = m->parseddesc; /* mark trace code */ M_NOP; - stackframesize = - (6 * 8) + /* s8 on stack parameters x 6 */ - (1 * 4) + /* methodinfo on stack parameter */ - (ARG_CNT * 8) + - (TMP_CNT * 8) - ; + /* allocate stack frame */ - M_ASUB_IMM(stackframesize, REG_SP); /* allocate stackframe */ + stackframesize = 96 + (md->paramcount * 8); - /* save argument registers */ + /* for leaf methods we need to store unused argument and temporary registers */ - off = (6 * 8) + (1 * 4); - - for (i = 0; i < INT_ARG_CNT; i++, off += 8) - M_IST(abi_registers_integer_argument[i], REG_SP, off); + if (code_is_leafmethod(code)) { + stackframesize += (ARG_CNT + TMP_CNT) * 8; + } - for (i = 0; i < FLT_ARG_CNT; i++, off += 8) - M_DST(abi_registers_float_argument[i], REG_SP, off); + /* allocate stack frame */ + + M_ASUB_IMM(stackframesize, REG_SP); + + /* store argument registers in array */ + + off = 96; + + for (i = 0; i < md->paramcount; i++) { + if (! md->params[i].inmemory) { + s = md->params[i].regoff; + switch (md->paramtypes[i].type) { + case TYPE_INT: + case TYPE_ADR: + M_IST(s, REG_SP, off); + break; + case TYPE_LNG: + M_LST(s, REG_SP, off); + break; + case TYPE_FLT: + M_FST(s, REG_SP, off); + break; + case TYPE_DBL: + M_DST(s, REG_SP, off); + break; + } + } + off += 8; + } + /* save unused (currently all) argument registers for leaf methods */ /* save temporary registers for leaf methods */ - if (jd->isleafmethod) { - for (i = 0; i < INT_TMP_CNT; i++, off += 8) - M_LST(abi_registers_integer_temporary[i], REG_SP, off); + if (code_is_leafmethod(code)) { - for (i = 0; i < FLT_TMP_CNT; i++, off += 8) - M_DST(abi_registers_float_temporary[i], REG_SP, off); - } - - /* Load arguments to new locations */ + for (i = 0; i < INT_ARG_CNT; ++i, off += 8) { + M_IST(abi_registers_integer_argument[i], REG_SP, off); + } - /* First move all arguments to stack - * - * (s8) a7 - * (s8) a2 - * ... - * (s8) a1 \ Auxilliary stack frame - * (s8) a0 / - * ------- <---- SP - */ + for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) { + M_DST(abi_registers_float_argument[i], REG_SP, off); + } - M_ASUB_IMM(2 * 8, REG_SP); - - /* offset to where first integer arg is saved on stack */ - off = (2 * 8) + (6 * 8) + (1 * 4); - /* offset to where first float arg is saved on stack */ - foff = off + (INT_ARG_CNT * 8); - /* offset to where first argument is passed on stack */ - aoff = (2 * 8) + stackframesize + (cd->stackframesize * 4); - /* offset to destination on stack */ - doff = 0; - - iargctr = fargctr = 0; - - ICONST(REG_ITMP1, 0); - - for (i = 0; i < md->paramcount && i < 8; i++) { - t = md->paramtypes[i].type; - - M_IST(REG_ITMP1, REG_SP, doff); - M_IST(REG_ITMP1, REG_SP, doff + 4); - - if (IS_FLT_DBL_TYPE(t)) { - if (fargctr < 2) { /* passed in register */ - N_STD(REG_FA0 + fargctr, doff, RN, REG_SP); - fargctr += 1; - } else { /* passed on stack */ - if (IS_2_WORD_TYPE(t)) { - N_MVC(doff, 8, REG_SP, aoff, REG_SP); - aoff += 8; - } else { - N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP); - aoff += 4; - } - } - } else { - if (IS_2_WORD_TYPE(t)) { - if (iargctr < 4) { /* passed in 2 registers */ - N_STM(REG_A0 + iargctr, REG_A0 + iargctr + 1, doff, REG_SP); - iargctr += 2; - } else { /* passed on stack */ - N_MVC(doff, 8, REG_SP, aoff, REG_SP); - aoff += 8; - } - } else { - if (iargctr < 5) { /* passed in register */ - N_ST(REG_A0 + iargctr, doff + 4, RN, REG_SP); - iargctr += 1; - } else { /* passed on stack */ - N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP); - aoff += 4; - } - } + for (i = 0; i < INT_TMP_CNT; ++i, off += 8) { + M_IST(abi_registers_integer_temporary[i], REG_SP, off); } - doff += 8; + for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) { + M_DST(abi_registers_float_temporary[i], REG_SP, off); + } } - /* Now move a0 and a1 to registers - * - * (s8) a7 - * ... - * (s8) a2 - * ------- <- SP - * (s8) a0 ==> a0, a1 - * (s8) a1 ==> a2, a3 - */ - - N_LM(REG_A0, REG_A1, 0, REG_SP); - N_LM(REG_A2, REG_A3, 8, REG_SP); + /* load arguments for trace_java_call_enter */ - M_AADD_IMM(2 * 8, REG_SP); - - /* Finally load methodinfo argument */ + /* methodinfo */ disp = dseg_add_address(cd, m); - M_ALD(REG_ITMP2, REG_PV, disp); - M_AST(REG_ITMP2, REG_SP, 6 * 8); + M_ALD_DSEG(REG_A0, disp); + /* pointer to argument registers array */ + M_LDA(REG_A1, REG_SP, 96); + /* pointer to on stack arguments */ + M_LDA(REG_A2, REG_SP, stackframesize + (cd->stackframesize * 8)); - /* Call builtin_verbosecall_enter */ + /* call trace_java_call_enter */ - disp = dseg_add_address(cd, builtin_verbosecall_enter); - M_ALD(REG_ITMP2, REG_PV, disp); - M_ASUB_IMM(96, REG_SP); + disp = dseg_add_functionptr(cd, trace_java_call_enter); + M_ALD_DSEG(REG_ITMP2, disp); M_CALL(REG_ITMP2); - M_AADD_IMM(96, REG_SP); - - /* restore argument registers */ - off = (6 * 8) + (1 * 4); + /* restore used argument registers */ + /* for leaf methods restore all argument and temporary registers */ - for (i = 0; i < INT_ARG_CNT; i++, off += 8) - M_ILD(abi_registers_integer_argument[i], REG_SP, off); + if (code_is_leafmethod(code)) { + off = 96 + (8 * md->paramcount); - for (i = 0; i < FLT_ARG_CNT; i++, off += 8) - M_DLD(abi_registers_float_argument[i], REG_SP, off); + for (i = 0; i < INT_ARG_CNT; ++i, off += 8) { + M_ILD(abi_registers_integer_argument[i], REG_SP, off); + } - /* restore temporary registers for leaf methods */ + for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) { + M_DLD(abi_registers_float_argument[i], REG_SP, off); + } - if (jd->isleafmethod) { - for (i = 0; i < INT_TMP_CNT; i++, off += 8) + for (i = 0; i < INT_TMP_CNT; ++i, off += 8) { M_ILD(abi_registers_integer_temporary[i], REG_SP, off); + } - for (i = 0; i < FLT_TMP_CNT; i++, off += 8) + for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) { M_DLD(abi_registers_float_temporary[i], REG_SP, off); + } + } else { + off = 96; + + for (i = 0; i < md->paramcount; i++) { + if (! md->params[i].inmemory) { + s = md->params[i].regoff; + switch (md->paramtypes[i].type) { + case TYPE_INT: + case TYPE_ADR: + M_ILD(s, REG_SP, off); + break; + case TYPE_LNG: + M_LLD(s, REG_SP, off); + break; + case TYPE_FLT: + M_FLD(s, REG_SP, off); + break; + case TYPE_DBL: + M_DLD(s, REG_SP, off); + break; + } + } + off += 8; + } } - /* remove stackframe */ + /* remove stack frame */ M_AADD_IMM(stackframesize, REG_SP); /* mark trace code */ M_NOP; + } #endif /* !defined(NDEBUG) */ @@ -610,47 +411,62 @@ void emit_verbosecall_exit(jitdata *jd) { methodinfo *m; codegendata *cd; - registerdata *rd; s4 disp; - - /* get required compiler data */ + s4 stackframesize; + s4 off; + s4 t; m = jd->m; cd = jd->cd; - rd = jd->rd; + t = m->parseddesc->returntype.type; /* mark trace code */ M_NOP; - M_ASUB_IMM(2 * 8, REG_SP); + /* allocate stackframe */ - N_STM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP); - M_DST(REG_FRESULT, REG_SP, 1 * 8); + stackframesize = 96 + (1 * 8); + M_ASUB_IMM(stackframesize, REG_SP); - if (IS_2_WORD_TYPE(m->parseddesc->returntype.type)) { - /* (REG_A0, REG_A1) == (REG_RESULT, REG_RESULT2), se no need to move */ + off = 96; + + /* store return values in array */ + + if (IS_INT_LNG_TYPE(t)) { + if (IS_2_WORD_TYPE(t)) { + M_LST(REG_RESULT_PACKED, REG_SP, off); + } else { + M_IST(REG_RESULT, REG_SP, off); + } } else { - M_INTMOVE(REG_RESULT, REG_A1); - ICONST(REG_A0, 0); + M_DST(REG_FRESULT, REG_SP, off); } + /* call trace_java_call_exit */ + disp = dseg_add_address(cd, m); - M_ALD(REG_A2, REG_PV, disp); + M_ALD_DSEG(REG_A0, disp); + M_LDA(REG_A1, REG_SP, off); + disp = dseg_add_functionptr(cd, trace_java_call_exit); + M_ALD_DSEG(REG_ITMP2, disp); + M_CALL(REG_ITMP2); - /* REG_FRESULT is REG_FA0, so no need to move */ - M_FLTMOVE(REG_FRESULT, REG_FA1); + /* restore return value */ - disp = dseg_add_address(cd, builtin_verbosecall_exit); - M_ALD(REG_ITMP1, REG_PV, disp); - M_ASUB_IMM(96, REG_SP); - M_CALL(REG_ITMP1); - M_AADD_IMM(96, REG_SP); + if (IS_INT_LNG_TYPE(t)) { + if (IS_2_WORD_TYPE(t)) { + M_LLD(REG_RESULT_PACKED, REG_SP, off); + } else { + M_ILD(REG_RESULT, REG_SP, off); + } + } else { + M_DLD(REG_FRESULT, REG_SP, off); + } - N_LM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP); - M_DLD(REG_FRESULT, REG_SP, 1 * 8); + /* remove stackframe */ - M_AADD_IMM(2 * 8, REG_SP); + M_AADD_IMM(stackframesize, REG_SP); /* mark trace code */ @@ -665,7 +481,7 @@ void emit_verbosecall_exit(jitdata *jd) *******************************************************************************/ -__PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg) +s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg) { codegendata *cd; s4 disp; @@ -680,7 +496,7 @@ __PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 te if (IS_INMEMORY(src->flags)) { COUNT_SPILLS; - disp = src->vv.regoff * 4; + disp = src->vv.regoff; M_ILD(tempreg, REG_SP, disp); @@ -698,7 +514,7 @@ __PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 te *******************************************************************************/ -__PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg) +s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg) { codegendata *cd; s4 disp; @@ -713,7 +529,7 @@ __PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tem if (IS_INMEMORY(src->flags)) { COUNT_SPILLS; - disp = src->vv.regoff * 4; + disp = src->vv.regoff; M_ILD(tempreg, REG_SP, disp + 4); @@ -725,33 +541,15 @@ __PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tem return reg; } -s4 emit_load_s1_notzero(jitdata *jd, instruction *iptr, s4 tempreg) { - codegendata *cd = jd->cd; - s4 reg = emit_load_s1(jd, iptr, tempreg); - if (reg == 0) { - M_MOV(reg, tempreg); - return tempreg; - } else { - return reg; - } -} - -s4 emit_load_s2_notzero(jitdata *jd, instruction *iptr, s4 tempreg) { - codegendata *cd = jd->cd; - s4 reg = emit_load_s2(jd, iptr, tempreg); - if (reg == 0) { - M_MOV(reg, tempreg); - return tempreg; - } else { - return reg; - } -} - s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) { codegendata *cd = jd->cd; s4 reg = emit_load_s1(jd, iptr, tempreg); if (reg == notreg) { - M_MOV(reg, tempreg); + if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) { + M_FMOV(reg, tempreg); + } else { + M_MOV(reg, tempreg); + } return tempreg; } else { return reg; @@ -762,100 +560,14 @@ s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) { codegendata *cd = jd->cd; s4 reg = emit_load_s2(jd, iptr, tempreg); if (reg == notreg) { - M_MOV(reg, tempreg); - return tempreg; - } else { - return reg; - } -} - -s4 emit_alloc_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) { - codegendata *cd; - s4 hr, lr; - varinfo *dst; - - /* (r0, r1) - * (r2, r3) - * (r4, r5) - * (r6, r7) - * (r8, r9) - * (r10, r11) - * (r12, r13) Illegal, because r13 is PV - * (r14, r15) Illegal, because r15 is SP - */ - - cd = jd->cd; - dst = VAROP(iptr->dst); - - if (IS_INMEMORY(dst->flags)) { - if (! IS_REG_ITMP(ltmpreg)) { - M_INTMOVE(ltmpreg, breg); - } - if (! IS_REG_ITMP(htmpreg)) { - M_INTMOVE(htmpreg, breg); - } - return PACK_REGS(ltmpreg, htmpreg); - } else { - hr = GET_HIGH_REG(dst->vv.regoff); - lr = GET_LOW_REG(dst->vv.regoff); - if (((hr % 2) == 0) && lr == (hr + 1)) { - /* the result is already in a even-odd pair */ - return dst->vv.regoff; - } else if (((hr % 2) == 0) && (hr < R12)) { - /* the high register is at a even position */ - M_INTMOVE(hr + 1, breg); - return PACK_REGS(hr + 1, hr); - } else if (((lr % 2) == 1) && (lr < R12)) { - /* the low register is at a odd position */ - M_INTMOVE(lr - 1, breg); - return PACK_REGS(lr, lr - 1); + if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) { + M_FMOV(reg, tempreg); } else { - /* no way to create an even-odd pair by 1 copy operation, - * Use the temporary register pair. - */ - if (! IS_REG_ITMP(ltmpreg)) { - M_INTMOVE(ltmpreg, breg); - } - if (! IS_REG_ITMP(htmpreg)) { - M_INTMOVE(htmpreg, breg); - } - return PACK_REGS(ltmpreg, htmpreg); - } - } -} - -void emit_restore_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) { - codegendata *cd; - s4 hr, lr; - varinfo *dst; - - cd = jd->cd; - dst = VAROP(iptr->dst); - - if (IS_INMEMORY(dst->flags)) { - if (! IS_REG_ITMP(ltmpreg)) { - M_INTMOVE(breg, ltmpreg); - } - if (! IS_REG_ITMP(htmpreg)) { - M_INTMOVE(breg, htmpreg); + M_MOV(reg, tempreg); } + return tempreg; } else { - hr = GET_HIGH_REG(dst->vv.regoff); - lr = GET_LOW_REG(dst->vv.regoff); - if (((hr % 2) == 0) && lr == (hr + 1)) { - return; - } else if (((hr % 2) == 0) && (hr < R12)) { - M_INTMOVE(breg, hr + 1); - } else if (((lr % 2) == 1) && (lr < R12)) { - M_INTMOVE(breg, lr - 1); - } else { - if (! IS_REG_ITMP(ltmpreg)) { - M_INTMOVE(breg, ltmpreg); - } - if (! IS_REG_ITMP(htmpreg)) { - M_INTMOVE(breg, htmpreg); - } - } + return reg; } } @@ -963,24 +675,23 @@ void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) { /* The actual long branch */ - disp = dseg_add_s4(cd, branchmpc + disp); - M_ILD(REG_ITMP3, REG_PV, disp); - M_AADD(REG_PV, REG_ITMP3); - M_JMP(RN, REG_ITMP3); + disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET); + M_ILD_DSEG(REG_ITMP2, disp); + M_AADD(REG_PV, REG_ITMP2); + M_JMP(RN, REG_ITMP2); /* Patch back the displacement */ - if (ref != NULL) { - *(u4 *)ref |= (u4)((cd->mcodeptr - ref) / 2); - } + N_BRC_BACK_PATCH(ref); } } -void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) { +void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) +{ if (INSTRUCTION_MUST_CHECK(iptr)) { M_TEST(reg); M_BNE(SZ_BRC + SZ_ILL); - M_ILL(EXCEPTION_HARDWARE_ARITHMETIC); + M_ILL(TRAP_ArithmeticException); } } @@ -996,12 +707,29 @@ void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, /* Size is s4, >= 0 * Do unsigned comparison to catch negative indexes. */ - N_CL(s2, OFFSET(java_arrayheader, size), RN, s1); + N_CL(s2, OFFSET(java_array_t, size), RN, s1); M_BLT(SZ_BRC + SZ_ILL); - M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS); + M_ILL2(s2, TRAP_ArrayIndexOutOfBoundsException); + } +} + + +/* emit_arraystore_check ******************************************************* + + Emit an ArrayStoreException check. + +*******************************************************************************/ + +void emit_arraystore_check(codegendata *cd, instruction *iptr) +{ + if (INSTRUCTION_MUST_CHECK(iptr)) { + M_TEST(REG_RESULT); + M_BNE(SZ_BRC + SZ_ILL); + M_ILL(TRAP_ArrayStoreException); } } + void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) { if (INSTRUCTION_MUST_CHECK(iptr)) { if (reg != RN) { @@ -1020,28 +748,30 @@ void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 r default: vm_abort("emit_classcast_check: unknown condition %d", condition); } - M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST); + M_ILL2(s1, TRAP_ClassCastException); } } -void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) { +void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) +{ if (INSTRUCTION_MUST_CHECK(iptr)) { M_TEST(reg); M_BNE(SZ_BRC + SZ_ILL); - M_ILL(EXCEPTION_HARDWARE_NULLPOINTER); + M_ILL(TRAP_NullPointerException); } } -void emit_exception_check(codegendata *cd, instruction *iptr) { +void emit_exception_check(codegendata *cd, instruction *iptr) +{ if (INSTRUCTION_MUST_CHECK(iptr)) { M_TEST(REG_RESULT); M_BNE(SZ_BRC + SZ_ILL); - M_ILL(EXCEPTION_HARDWARE_EXCEPTION); + M_ILL(TRAP_CHECK_EXCEPTION); } } void emit_restore_pv(codegendata *cd) { - s4 offset; + s4 offset, offset_imm; /* N_BASR(REG_PV, RN); @@ -1056,23 +786,35 @@ void emit_restore_pv(codegendata *cd) { /* Displacement from start of method to here */ offset = (s4) (cd->mcodeptr - cd->mcodebase); + offset_imm = -offset - SZ_BASR + N_PV_OFFSET; - if (N_VALID_IMM(-(offset + SZ_BASR))) { + if (N_VALID_IMM(offset_imm)) { /* Get program counter */ N_BASR(REG_PV, RN); /* Substract displacement */ - M_ASUB_IMM(offset + SZ_BASR, REG_PV); + M_AADD_IMM(offset_imm, REG_PV); } else { /* Save program counter and jump over displacement in instruction flow */ N_BRAS(REG_PV, SZ_BRAS + SZ_LONG); /* Place displacement here */ /* REG_PV points now exactly to this position */ - N_LONG(offset + SZ_BRAS); + N_LONG(-offset - SZ_BRAS + N_PV_OFFSET); /* Substract *(REG_PV) from REG_PV */ - N_S(REG_PV, 0, RN, REG_PV); + N_A(REG_PV, 0, RN, REG_PV); } } +/* emit_trap_compiler ********************************************************** + + Emit a trap instruction which calls the JIT compiler. + +*******************************************************************************/ + +void emit_trap_compiler(codegendata *cd) +{ + M_ILL2(REG_METHODPTR, TRAP_COMPILER); +} + /* * These are local overrides for various environment variables in Emacs. * Please do not remove this and leave it at the end of the file, where