X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fvm%2Fjit%2Fmips%2Farch.h;h=73fe24a4b2f99f050855aa02e71eba20991745f3;hb=f1bcc1f443ffa393025fa158d4bf6487a7316c4d;hp=41e7e8a2cc06fc8edc08b2f976c0a1c4491b5373;hpb=410d4924fc0ccadc421173e6b959856e28815982;p=cacao.git diff --git a/src/vm/jit/mips/arch.h b/src/vm/jit/mips/arch.h index 41e7e8a2c..73fe24a4b 100644 --- a/src/vm/jit/mips/arch.h +++ b/src/vm/jit/mips/arch.h @@ -1,9 +1,7 @@ /* src/vm/jit/mips/arch.h - architecture defines for MIPS - Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates, - R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner, - C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger, - Institut f. Computersprachen - TU Wien + Copyright (C) 1996-2010 + CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO This file is part of CACAO. @@ -19,16 +17,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - 02111-1307, USA. - - Contact: cacao@complang.tuwien.ac.at - - Authors: Christian Thalinger - - Changes: - - $Id: arch.h 2039 2005-03-20 11:24:19Z twisti $ + Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + 02110-1301, USA. */ @@ -36,96 +26,163 @@ #ifndef _ARCH_H #define _ARCH_H -/* preallocated registers *****************************************************/ +#define JIT_COMPILER_VIA_SIGNAL -/* integer registers */ - -#define REG_ZERO 0 /* always zero */ +#include "config.h" -#define REG_RESULT 2 /* to deliver method results */ -#define REG_ITMP1 1 /* temporary register */ -#define REG_ITMP2 3 /* temporary register and method pointer */ -#define REG_ITMP3 25 /* temporary register */ +/* define architecture features ***********************************************/ -#define REG_ARG_0 4 /* argument register */ -#define REG_ARG_1 5 /* argument register */ -#define REG_ARG_2 6 /* argument register */ -#define REG_ARG_3 7 /* argument register */ -#define REG_ARG_4 8 /* argument register */ -#define REG_ARG_5 9 /* argument register */ +#if SIZEOF_VOID_P == 8 -#define REG_RA 31 /* return address */ -#define REG_SP 29 /* stack pointer */ -#define REG_GP 28 /* global pointer */ +#define SUPPORT_DIVISION 1 +#define SUPPORT_LONG 1 -#define REG_PV 30 /* procedure vector, must be provided by caller */ -#define REG_METHODPTR 25 /* pointer to the place from where the procedure */ - /* vector has been fetched */ -#define REG_ITMP1_XPTR 1 /* exception pointer = temporary register 1 */ -#define REG_ITMP2_XPC 3 /* exception pc = temporary register 2 */ +#define SUPPORT_I2F 1 +#define SUPPORT_I2D 1 +#define SUPPORT_L2F 1 +#define SUPPORT_L2D 1 +#define SUPPORT_F2I 0 +#define SUPPORT_F2L 0 +#define SUPPORT_D2I 0 +#define SUPPORT_D2L 0 -/* floating point registers */ +#define SUPPORT_LONG_ADD 1 +#define SUPPORT_LONG_CMP 0 +#define SUPPORT_LONG_CMP_CONST 1 +#define SUPPORT_LONG_LOGICAL 1 +#define SUPPORT_LONG_SHIFT 1 +#define SUPPORT_LONG_MUL 1 +#define SUPPORT_LONG_DIV 1 -#define REG_FRESULT 0 /* to deliver floating point method results */ +#define SUPPORT_LONG_DIV_POW2 1 +#define SUPPORT_LONG_REM_POW2 1 -#define REG_FTMP1 1 /* temporary floating point register */ -#define REG_FTMP2 2 /* temporary floating point register */ -#define REG_FTMP3 3 /* temporary floating point register */ +#define SUPPORT_CONST_LOGICAL 1 /* AND, OR, XOR with immediates */ +#define SUPPORT_CONST_MUL 1 /* mutiply with immediate */ -#define REG_IFTMP 1 /* temporary integer and floating point register */ +#define SUPPORT_CONST_STORE 1 /* do we support const stores */ +#define SUPPORT_CONST_STORE_ZERO_ONLY 1 /* on some risc machines we can */ + /* only store REG_ZERO */ -#define INT_SAV_CNT 8 /* number of int callee saved registers */ -#define INT_ARG_CNT 8 /* number of int argument registers */ +/* float **********************************************************************/ -#define FLT_SAV_CNT 4 /* number of flt callee saved registers */ -#define FLT_ARG_CNT 8 /* number of flt argument registers */ +#define SUPPORT_FLOAT 1 -#define TRACE_ARGS_NUM 8 +#if defined(ENABLE_SOFT_FLOAT_CMP) +# define SUPPORT_FLOAT_CMP 0 +#else +# define SUPPORT_FLOAT_CMP 1 +#endif -/* define architecture features ***********************************************/ +/* double *********************************************************************/ -#define POINTERSIZE 8 -#define WORDS_BIGENDIAN 1 +#define SUPPORT_DOUBLE 1 -#define U8_AVAILABLE 1 +#if defined(ENABLE_SOFT_FLOAT_CMP) +# define SUPPORT_DOUBLE_CMP 0 +#else +# define SUPPORT_DOUBLE_CMP 1 +#endif -/* #define USE_CODEMMAP */ -#define USEBUILTINTABLE +#else /* SIZEOF_VOID_P == 8 */ -#define SUPPORT_DIVISION 0 +#define SUPPORT_DIVISION 1 #define SUPPORT_LONG 1 -#define SUPPORT_FLOAT 1 -#define SUPPORT_DOUBLE 1 -#define SUPPORT_FMOD 1 -#define SUPPORT_IFCVT 1 -#define SUPPORT_FICVT 0 +#define SUPPORT_I2F 0 +#define SUPPORT_I2D 0 +#define SUPPORT_L2F 0 +#define SUPPORT_L2D 0 + +#define SUPPORT_F2I 0 +#define SUPPORT_F2L 0 +#define SUPPORT_D2I 0 +#define SUPPORT_D2L 0 #define SUPPORT_LONG_ADD 1 -#define SUPPORT_LONG_CMP 1 +#define SUPPORT_LONG_CMP 0 +#define SUPPORT_LONG_CMP_CONST 1 #define SUPPORT_LONG_LOGICAL 1 -#define SUPPORT_LONG_SHIFT 1 -#define SUPPORT_LONG_MUL 1 +#define SUPPORT_LONG_SHIFT 0 +#define SUPPORT_LONG_MUL 0 #define SUPPORT_LONG_DIV 0 -#define SUPPORT_LONG_ICVT 0 -#define SUPPORT_LONG_FCVT 1 + +#define SUPPORT_LONG_DIV_POW2 0 +#define SUPPORT_LONG_REM_POW2 0 + #define SUPPORT_CONST_LOGICAL 1 /* AND, OR, XOR with immediates */ #define SUPPORT_CONST_MUL 1 /* mutiply with immediate */ -#define SUPPORT_CONST_STORE 0 /* do we support const stores */ +#define SUPPORT_CONST_STORE 1 /* do we support const stores */ #define SUPPORT_CONST_STORE_ZERO_ONLY 1 /* on some risc machines we can */ /* only store REG_ZERO */ -/* #define CONDITIONAL_LOADCONST 1 */ -/* #define CONSECUTIVE_INTARGS */ -/* #define CONSECUTIVE_FLOATARGS */ +/* float **********************************************************************/ + +#define SUPPORT_FLOAT 1 + +#if defined(ENABLE_SOFT_FLOAT_CMP) +# define SUPPORT_FLOAT_CMP 0 +#else +# define SUPPORT_FLOAT_CMP 1 +#endif + + +/* double *********************************************************************/ + +#define SUPPORT_DOUBLE 1 + +#if defined(ENABLE_SOFT_FLOAT_CMP) +# define SUPPORT_DOUBLE_CMP 0 +#else +# define SUPPORT_DOUBLE_CMP 1 +#endif + + +#define SUPPORT_COMBINE_INTEGER_REGISTERS + +#if defined(ENABLE_SOFT_FLOAT) +# define SUPPORT_PASS_FLOATARGS_IN_INTREGS +#endif + +#endif /* SIZEOF_VOID_P == 8 */ + + +/* branches *******************************************************************/ + +#define SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER 0 +#define SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER 1 +#define SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS 1 + + +/* exceptions *****************************************************************/ + +#define SUPPORT_HARDWARE_DIVIDE_BY_ZERO 0 + + +/* stackframe *****************************************************************/ + +#define STACKFRMAE_RA_BETWEEN_FRAMES 0 +#define STACKFRAME_RA_TOP_OF_FRAME 1 +#define STACKFRAME_RA_LINKAGE_AREA 0 +#define STACKFRAME_LEAFMETHODS_RA_REGISTER 1 +#define STACKFRAME_SYNC_NEEDS_TWO_SLOTS 1 + + +/* replacement ****************************************************************/ + +#define REPLACEMENT_PATCH_SIZE (2*4) /* bytes */ + +/* subtype ********************************************************************/ + +#define USES_NEW_SUBTYPE 1 #endif /* _ARCH_H */