X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fvm%2Fjit%2Fi386%2Fcodegen.c;h=017dced78f0f02a871400dc9383d9f88dede14de;hb=d75b6037acf17c342166b9c9bd6e657dfdd12cd9;hp=97de619b03409bc932688aaf98aa0b419ab31a4a;hpb=86f0a41164b598b443d1b57eb14a8b9b7caa5bad;p=cacao.git diff --git a/src/vm/jit/i386/codegen.c b/src/vm/jit/i386/codegen.c index 97de619b0..017dced78 100644 --- a/src/vm/jit/i386/codegen.c +++ b/src/vm/jit/i386/codegen.c @@ -1,10 +1,9 @@ -/* jit/i386/codegen.c - machine code generator for i386 +/* vm/jit/i386/codegen.c - machine code generator for i386 - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 - Institut f. Computersprachen, TU Wien - R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst, - S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, - J. Wenninger + Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates, + R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner, + C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger, + Institut f. Computersprachen - TU Wien This file is part of CACAO. @@ -28,29 +27,37 @@ Authors: Andreas Krall Christian Thalinger - $Id: codegen.c 718 2003-12-08 13:03:43Z jowenn $ + Changes: Joseph Wenninger + + $Id: codegen.c 1735 2004-12-07 14:33:27Z twisti $ */ +#define _GNU_SOURCE + #include -#include -#include "types.h" -#include "parse.h" -#include "codegen.h" -#include "jit.h" -#include "reg.h" -#include "builtin.h" -#include "asmpart.h" -#include "jni.h" -#include "loader.h" -#include "tables.h" -#include "native.h" -#include "methodtable.h" - -/* include independent code generation stuff */ -#include "codegen.inc" -#include "reg.inc" +#include +#ifdef __FreeBSD__ +#include +#endif + +#include "config.h" +#include "native/jni.h" +#include "native/native.h" +#include "vm/builtin.h" +#include "vm/exceptions.h" +#include "vm/global.h" +#include "vm/loader.h" +#include "vm/tables.h" +#include "vm/jit/asmpart.h" +#include "vm/jit/jit.h" +#include "vm/jit/parse.h" +#include "vm/jit/reg.h" +#include "vm/jit/i386/codegen.h" +#include "vm/jit/i386/emitfuncs.h" +#include "vm/jit/i386/types.h" +#include "vm/jit/i386/asmoffsets.h" /* register descripton - array ************************************************/ @@ -64,280 +71,103 @@ /* #define REG_END -1 last entry in tables */ -int nregdescint[] = { - REG_RET, REG_RES, REG_RES, REG_SAV, REG_RES, REG_SAV, REG_TMP, REG_TMP, - REG_END }; +static int nregdescint[] = { + REG_RET, REG_RES, REG_RES, REG_TMP, REG_RES, REG_SAV, REG_SAV, REG_SAV, + REG_END +}; -/* for use of reserved registers, see comment above */ -int nregdescfloat[] = { +static int nregdescfloat[] = { /* rounding problems with callee saved registers */ /* REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_RES, REG_RES, */ /* REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, */ REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, - REG_END }; + REG_END +}; -/* additional functions and macros to generate code ***************************/ +/******************************************************************************* -#define BlockPtrOfPC(pc) ((basicblock *) iptr->target) + include independent code generation stuff -- include after register + descriptions to avoid extern definitions +*******************************************************************************/ -#ifdef STATISTICS -#define COUNT_SPILLS count_spills++ -#else -#define COUNT_SPILLS +#include "vm/jit/codegen.inc" +#include "vm/jit/reg.inc" +#ifdef LSRA +#include "vm/jit/lsra.inc" #endif +void codegen_stubcalled() { + log_text("Stub has been called"); +} -#define CALCOFFSETBYTES(var, val) \ - if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \ - else if ((s4) (val) != 0) (var) += 1; - - -#define CALCREGOFFBYTES(var, val) \ - if ((val) > 15) (var) += 4; \ - else if ((val) != 0) (var) += 1; - - -#define CALCIMMEDIATEBYTES(var, val) \ - if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \ - else (var) += 1; - - -/* gen_nullptr_check(objreg) */ - -#define gen_nullptr_check(objreg) \ - if (checknull) { \ - i386_test_reg_reg((objreg), (objreg)); \ - i386_jcc(I386_CC_E, 0); \ - codegen_addxnullrefs(mcodeptr); \ - } - - -/* MCODECHECK(icnt) */ - -#define MCODECHECK(icnt) \ - if ((mcodeptr + (icnt)) > (u1*) mcodeend) mcodeptr = (u1*) codegen_increase((u1*) mcodeptr) - -/* M_INTMOVE: - generates an integer-move from register a to b. - if a and b are the same int-register, no code will be generated. -*/ - -#define M_INTMOVE(reg,dreg) if ((reg) != (dreg)) { i386_mov_reg_reg((reg),(dreg)); } - - -/* M_FLTMOVE: - generates a floating-point-move from register a to b. - if a and b are the same float-register, no code will be generated -*/ - -#define M_FLTMOVE(reg,dreg) panic("M_FLTMOVE"); - -#define M_LNGMEMMOVE(reg,dreg) \ - do { \ - i386_mov_membase_reg(REG_SP, (reg) * 8, REG_ITMP1); \ - i386_mov_membase_reg(REG_SP, (reg) * 8 + 4, REG_ITMP2); \ - i386_mov_reg_membase(REG_ITMP1, REG_SP, (dreg) * 8); \ - i386_mov_reg_membase(REG_ITMP2, REG_SP, (dreg) * 8 + 4); \ - } while (0) - - -/* var_to_reg_xxx: - this function generates code to fetch data from a pseudo-register - into a real register. - If the pseudo-register has actually been assigned to a real - register, no code will be emitted, since following operations - can use this register directly. - - v: pseudoregister to be fetched from - tempregnum: temporary register to be used if v is actually spilled to ram - - return: the register number, where the operand can be found after - fetching (this wil be either tempregnum or the register - number allready given to v) -*/ - -#define var_to_reg_int(regnr,v,tempnr) \ - if ((v)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_mov_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \ - regnr = tempnr; \ - } else { \ - regnr = (v)->regoff; \ - } - - - -#define var_to_reg_flt(regnr,v,tempnr) \ - if ((v)->type == TYPE_FLT) { \ - if ((v)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_flds_membase(REG_SP, (v)->regoff * 8); \ - fpu_st_offset++; \ - regnr = tempnr; \ - } else { \ - i386_fld_reg((v)->regoff + fpu_st_offset); \ - fpu_st_offset++; \ - regnr = (v)->regoff; \ - } \ - } else { \ - if ((v)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_fldl_membase(REG_SP, (v)->regoff * 8); \ - fpu_st_offset++; \ - regnr = tempnr; \ - } else { \ - i386_fld_reg((v)->regoff + fpu_st_offset); \ - fpu_st_offset++; \ - regnr = (v)->regoff; \ - } \ - } - -#define NEW_var_to_reg_flt(regnr,v,tempnr) \ - if ((v)->type == TYPE_FLT) { \ - if ((v)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_flds_membase(REG_SP, (v)->regoff * 8); \ - fpu_st_offset++; \ - regnr = tempnr; \ - } else { \ - regnr = (v)->regoff; \ - } \ - } else { \ - if ((v)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_fldl_membase(REG_SP, (v)->regoff * 8); \ - fpu_st_offset++; \ - regnr = tempnr; \ - } else { \ - regnr = (v)->regoff; \ - } \ - } - +void codegen_general_stubcalled() { + log_text("general exception stub has been called"); +} -/* reg_of_var: - This function determines a register, to which the result of an operation - should go, when it is ultimatively intended to store the result in - pseudoregister v. - If v is assigned to an actual register, this register will be returned. - Otherwise (when v is spilled) this function returns tempregnum. - If not already done, regoff and flags are set in the stack location. -*/ -static int reg_of_var(stackptr v, int tempregnum) +#if defined(USE_THREADS) && defined(NATIVE_THREADS) +void thread_restartcriticalsection(ucontext_t *uc) { - varinfo *var; + void *critical; +#ifdef __FreeBSD__ + if ((critical = thread_checkcritical((void*) uc->uc_mcontext.mc_eip)) != NULL) + uc->uc_mcontext.mc_eip = (u4) critical; +#else + if ((critical = thread_checkcritical((void*) uc->uc_mcontext.gregs[REG_EIP])) != NULL) + uc->uc_mcontext.gregs[REG_EIP] = (u4) critical; - switch (v->varkind) { - case TEMPVAR: - if (!(v->flags & INMEMORY)) - return(v->regoff); - break; - case STACKVAR: - var = &(interfaces[v->varnum][v->type]); - v->regoff = var->regoff; - if (!(var->flags & INMEMORY)) - return(var->regoff); - break; - case LOCALVAR: - var = &(locals[v->varnum][v->type]); - v->regoff = var->regoff; - if (!(var->flags & INMEMORY)) - return(var->regoff); - break; - case ARGVAR: - v->regoff = v->varnum; - if (IS_FLT_DBL_TYPE(v->type)) { - if (v->varnum < fltreg_argnum) { - v->regoff = argfltregs[v->varnum]; - return(argfltregs[v->varnum]); - } - } - else - if (v->varnum < intreg_argnum) { - v->regoff = argintregs[v->varnum]; - return(argintregs[v->varnum]); - } - v->regoff -= intreg_argnum; - break; - } - v->flags |= INMEMORY; - return tempregnum; +#endif } +#endif -/* store_reg_to_var_xxx: - This function generates the code to store the result of an operation - back into a spilled pseudo-variable. - If the pseudo-variable has not been spilled in the first place, this - function will generate nothing. - - v ............ Pseudovariable - tempregnum ... Number of the temporary registers as returned by - reg_of_var. -*/ - -#define store_reg_to_var_int(sptr, tempregnum) \ - if ((sptr)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_mov_reg_membase(tempregnum, REG_SP, (sptr)->regoff * 8); \ - } - - -#define store_reg_to_var_flt(sptr, tempregnum) \ - if ((sptr)->type == TYPE_FLT) { \ - if ((sptr)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_fstps_membase(REG_SP, (sptr)->regoff * 8); \ - fpu_st_offset--; \ - } else { \ -/* i386_fxch_reg((sptr)->regoff);*/ \ - i386_fstp_reg((sptr)->regoff + fpu_st_offset); \ - fpu_st_offset--; \ - } \ - } else { \ - if ((sptr)->flags & INMEMORY) { \ - COUNT_SPILLS; \ - i386_fstpl_membase(REG_SP, (sptr)->regoff * 8); \ - fpu_st_offset--; \ - } else { \ -/* i386_fxch_reg((sptr)->regoff);*/ \ - i386_fstp_reg((sptr)->regoff + fpu_st_offset); \ - fpu_st_offset--; \ - } \ - } - /* NullPointerException signal handler for hardware null pointer check */ -void catch_NullPointerException(int sig) +void catch_NullPointerException(int sig, siginfo_t *siginfo, void *_p) { sigset_t nsig; - int instr; /* long faultaddr; */ - void **_p = (void **) &sig; - struct sigcontext *sigctx = (struct sigcontext *) ++_p; +#ifdef __FreeBSD__ + ucontext_t *_uc = (ucontext_t *) _p; + mcontext_t *sigctx = (mcontext_t *) &_uc->uc_mcontext; +#else + struct ucontext *_uc = (struct ucontext *) _p; + struct sigcontext *sigctx = (struct sigcontext *) &_uc->uc_mcontext; +#endif + struct sigaction act; /* Reset signal handler - necessary for SysV, does no harm for BSD */ - instr = *((int*)(sigctx->eip)); +/* instr = *((int*)(sigctx->eip)); */ /* faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f]; */ -/* fprintf(stderr, "null=%d %p addr=%p\n", sig, sigctx, sigctx->eip); */ +/* fprintf(stderr, "null=%d %p addr=%p\n", sig, sigctx, sigctx->eip);*/ /* if (faultaddr == 0) { */ - signal(sig, (void *) catch_NullPointerException); /* reinstall handler */ - sigemptyset(&nsig); - sigaddset(&nsig, sig); - sigprocmask(SIG_UNBLOCK, &nsig, NULL); /* unblock signal */ - sigctx->eax = (long) proto_java_lang_NullPointerException; /* REG_ITMP1_XPTR */ - sigctx->edx = sigctx->eip; /* REG_ITMP2_XPC */ - sigctx->eip = (long) asm_handle_exception; +/* signal(sig, (void *) catch_NullPointerException); */ + act.sa_sigaction = (functionptr) catch_NullPointerException; + act.sa_flags = SA_SIGINFO; + sigaction(sig, &act, NULL); /* reinstall handler */ - return; + sigemptyset(&nsig); + sigaddset(&nsig, sig); + sigprocmask(SIG_UNBLOCK, &nsig, NULL); /* unblock signal */ + +#ifdef __FreeBSD__ + sigctx->mc_ecx = sigctx->mc_eip; /* REG_ITMP2_XPC*/ + sigctx->mc_eax = (u4) string_java_lang_NullPointerException; + sigctx->mc_eip = (u4) asm_throw_and_handle_exception; +#else + sigctx->ecx = sigctx->eip; /* REG_ITMP2_XPC */ + sigctx->eax = (u4) string_java_lang_NullPointerException; + sigctx->eip = (u4) asm_throw_and_handle_exception; +#endif + return; /* } else { */ /* faultaddr += (long) ((instr << 16) >> 16); */ @@ -347,109 +177,122 @@ void catch_NullPointerException(int sig) } -/* ArithmeticException signal handler for hardware divide by zero check */ +/* ArithmeticException signal handler for hardware divide by zero check */ -void catch_ArithmeticException(int sig) +void catch_ArithmeticException(int sig, siginfo_t *siginfo, void *_p) { sigset_t nsig; - void **_p = (void **) &sig; - struct sigcontext *sigctx = (struct sigcontext *) ++_p; +/* void **_p = (void **) &sig; */ +/* struct sigcontext *sigctx = (struct sigcontext *) ++_p; */ + +#ifdef __FreeBSD__ + ucontext_t *_uc = (ucontext_t *) _p; + mcontext_t *sigctx = (mcontext_t *) &_uc->uc_mcontext; +#else + struct ucontext *_uc = (struct ucontext *) _p; + struct sigcontext *sigctx = (struct sigcontext *) &_uc->uc_mcontext; +#endif - classinfo *c; - java_objectheader *p; - methodinfo *m; + struct sigaction act; /* Reset signal handler - necessary for SysV, does no harm for BSD */ - signal(sig, (void *) catch_ArithmeticException); /* reinstall handler */ +/* signal(sig, (void *) catch_ArithmeticException); */ + act.sa_sigaction = (functionptr) catch_ArithmeticException; + act.sa_flags = SA_SIGINFO; + sigaction(sig, &act, NULL); /* reinstall handler */ + sigemptyset(&nsig); sigaddset(&nsig, sig); sigprocmask(SIG_UNBLOCK, &nsig, NULL); /* unblock signal */ - c = loader_load(utf_new_char("java/lang/ArithmeticException")); - p = builtin_new(c); - m = class_findmethod(c, - utf_new_char(""), - utf_new_char("(Ljava/lang/String;)V")); - - asm_calljavamethod(m, p, javastring_new_char("/ by zero"), NULL, NULL); - - sigctx->eax = (long) p; /* REG_ITMP1_XPTR */ - sigctx->edx = sigctx->eip; /* REG_ITMP2_XPC */ - sigctx->eip = (long) asm_handle_exception; - +#ifdef __FreeBSD__ + sigctx->mc_ecx = sigctx->mc_eip; /* REG_ITMP2_XPC */ + sigctx->mc_eip = (u4) asm_throw_and_handle_hardware_arithmetic_exception; +#else + sigctx->ecx = sigctx->eip; /* REG_ITMP2_XPC */ + sigctx->eip = (u4) asm_throw_and_handle_hardware_arithmetic_exception; +#endif return; } void init_exceptions(void) { + struct sigaction act; + /* install signal handlers we need to convert to exceptions */ + sigemptyset(&act.sa_mask); if (!checknull) { - #if defined(SIGSEGV) - signal(SIGSEGV, (void *) catch_NullPointerException); +/* signal(SIGSEGV, (void *) catch_NullPointerException); */ + act.sa_sigaction = (functionptr) catch_NullPointerException; + act.sa_flags = SA_SIGINFO; + sigaction(SIGSEGV, &act, NULL); #endif #if defined(SIGBUS) - signal(SIGBUS, (void *) catch_NullPointerException); +/* signal(SIGBUS, (void *) catch_NullPointerException); */ + act.sa_sigaction = (functionptr) catch_NullPointerException; + act.sa_flags = SA_SIGINFO; + sigaction(SIGBUS, &act, NULL); #endif } - signal(SIGFPE, (void *) catch_ArithmeticException); +/* signal(SIGFPE, (void *) catch_ArithmeticException); */ + act.sa_sigaction = (functionptr) catch_ArithmeticException; + act.sa_flags = SA_SIGINFO; + sigaction(SIGFPE, &act, NULL); } -/* function gen_mcode ********************************************************** +/* function codegen ************************************************************ generates machine code *******************************************************************************/ -/* global code generation pointer */ -u1 *mcodeptr; - -void codegen() +void codegen(methodinfo *m, codegendata *cd, registerdata *rd) { - int len, s1, s2, s3, d/*, bbs*/; - s4 a; - stackptr src; - varinfo *var; -/* varinfo *dst; */ - basicblock *bptr; - instruction *iptr; - - int fpu_st_offset = 0; + s4 len, s1, s2, s3, d; + s4 a; + stackptr src; + varinfo *var; + basicblock *bptr; + instruction *iptr; + s4 parentargs_base; + u2 currentline; + s4 fpu_st_offset = 0; - xtable *ex; + exceptiontable *ex; { - int p, pa, t, l, r; - - savedregs_num = 0; + s4 i, p, pa, t, l; + s4 savedregs_num = 0; /* space to save used callee saved registers */ - savedregs_num += (savintregcnt - maxsavintreguse); - savedregs_num += (savfltregcnt - maxsavfltreguse); + savedregs_num += (rd->savintregcnt - rd->maxsavintreguse); + savedregs_num += (rd->savfltregcnt - rd->maxsavfltreguse); - parentargs_base = maxmemuse + savedregs_num; + parentargs_base = rd->maxmemuse + savedregs_num; -#ifdef USE_THREADS /* space to save argument of monitor_enter */ + +#if defined(USE_THREADS) /* space to save argument of monitor_enter */ - if (checksync && (method->flags & ACC_SYNCHRONIZED)) + if (checksync && (m->flags & ACC_SYNCHRONIZED)) parentargs_base++; #endif /* create method header */ - (void) dseg_addaddress(method); /* MethodPointer */ - (void) dseg_adds4(parentargs_base * 8); /* FrameSize */ + (void) dseg_addaddress(cd, m); /* MethodPointer */ + (void) dseg_adds4(cd, parentargs_base * 8); /* FrameSize */ -#ifdef USE_THREADS +#if defined(USE_THREADS) /* IsSync contains the offset relative to the stack pointer for the argument of monitor_exit used in the exception handler. Since the @@ -457,93 +300,82 @@ void codegen() offset by one. */ - if (checksync && (method->flags & ACC_SYNCHRONIZED)) - (void) dseg_adds4((maxmemuse + 1) * 8); /* IsSync */ + if (checksync && (m->flags & ACC_SYNCHRONIZED)) + (void) dseg_adds4(cd, (rd->maxmemuse + 1) * 8); /* IsSync */ else #endif - (void) dseg_adds4(0); /* IsSync */ + (void) dseg_adds4(cd, 0); /* IsSync */ - (void) dseg_adds4(isleafmethod); /* IsLeaf */ - (void) dseg_adds4(savintregcnt - maxsavintreguse); /* IntSave */ - (void) dseg_adds4(savfltregcnt - maxsavfltreguse); /* FltSave */ - (void) dseg_adds4(exceptiontablelength); /* ExTableSize */ - + (void) dseg_adds4(cd, m->isleafmethod); /* IsLeaf */ + (void) dseg_adds4(cd, rd->savintregcnt - rd->maxsavintreguse); /* IntSave */ + (void) dseg_adds4(cd, rd->savfltregcnt - rd->maxsavfltreguse); /* FltSave */ + + /* adds a reference for the length of the line number counter. We don't + know the size yet, since we evaluate the information during code + generation, to save one additional iteration over the whole + instructions. During code optimization the position could have changed + to the information gotten from the class file */ + (void) dseg_addlinenumbertablesize(cd); + + (void) dseg_adds4(cd, cd->exceptiontablelength); /* ExTableSize */ + /* create exception table */ - for (ex = extable; ex != NULL; ex = ex->down) { - -#ifdef LOOP_DEBUG - if (ex->start != NULL) - printf("adding start - %d - ", ex->start->debug_nr); - else { - printf("PANIC - start is NULL"); - exit(-1); - } -#endif - - dseg_addtarget(ex->start); - -#ifdef LOOP_DEBUG - if (ex->end != NULL) - printf("adding end - %d - ", ex->end->debug_nr); - else { - printf("PANIC - end is NULL"); - exit(-1); - } -#endif - - dseg_addtarget(ex->end); - -#ifdef LOOP_DEBUG - if (ex->handler != NULL) - printf("adding handler - %d\n", ex->handler->debug_nr); - else { - printf("PANIC - handler is NULL"); - exit(-1); - } -#endif - - dseg_addtarget(ex->handler); - - (void) dseg_addaddress(ex->catchtype); + for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) { + dseg_addtarget(cd, ex->start); + dseg_addtarget(cd, ex->end); + dseg_addtarget(cd, ex->handler); + (void) dseg_addaddress(cd, ex->catchtype); } + /* initialize mcode variables */ - mcodeptr = (u1*) mcodebase; - mcodeend = (s4*) (mcodebase + mcodesize); - MCODECHECK(128 + mparamcount); + cd->mcodeptr = cd->mcodebase; + cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize); + MCODECHECK(128 + m->paramcount); /* create stack frame (if necessary) */ if (parentargs_base) { - i386_alu_imm_reg(I386_SUB, parentargs_base * 8, REG_SP); + i386_alu_imm_reg(cd, I386_SUB, parentargs_base * 8, REG_SP); } /* save return address and used callee saved registers */ p = parentargs_base; - for (r = savintregcnt - 1; r >= maxsavintreguse; r--) { - p--; i386_mov_reg_membase(savintregs[r], REG_SP, p * 8); + for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) { + p--; i386_mov_reg_membase(cd, rd->savintregs[i], REG_SP, p * 8); } - for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--) { - p--; i386_fld_reg(savfltregs[r]); i386_fstpl_membase(REG_SP, p * 8); + for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) { + p--; i386_fld_reg(cd, rd->savfltregs[i]); i386_fstpl_membase(cd, REG_SP, p * 8); } /* save monitorenter argument */ -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - if (method->flags & ACC_STATIC) { - i386_mov_imm_reg((s4) class, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, maxmemuse * 8); +#if defined(USE_THREADS) + if (checksync && (m->flags & ACC_SYNCHRONIZED)) { + s4 func_enter = (m->flags & ACC_STATIC) ? + (s4) builtin_staticmonitorenter : (s4) builtin_monitorenter; + + if (m->flags & ACC_STATIC) { + i386_mov_imm_reg(cd, (s4) m->class, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, rd->maxmemuse * 8); } else { - i386_mov_membase_reg(REG_SP, parentargs_base * 8 + 4, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, maxmemuse * 8); + i386_mov_membase_reg(cd, REG_SP, parentargs_base * 8 + 4, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, rd->maxmemuse * 8); } + + /* call monitorenter function */ + + i386_alu_imm_reg(cd, I386_SUB, 4, REG_SP); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, 0); + i386_mov_imm_reg(cd, func_enter, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADD, 4, REG_SP); } #endif @@ -552,69 +384,72 @@ void codegen() */ if (runverbose) { - i386_alu_imm_reg(I386_SUB, TRACE_ARGS_NUM * 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_SUB, TRACE_ARGS_NUM * 8 + 4, REG_SP); + + for (p = 0; p < m->paramcount && p < TRACE_ARGS_NUM; p++) { + t = m->paramtypes[p]; - for (p = 0; p < mparamcount; p++) { - t = mparamtypes[p]; if (IS_INT_LNG_TYPE(t)) { if (IS_2_WORD_TYPE(t)) { - i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); - i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4 + 4, REG_ITMP2); - - } else if (t == TYPE_ADR) { - i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); - i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8); + i386_mov_membase_reg(cd, REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4 + 4, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8 + 4); +/* } else if (t == TYPE_ADR) { */ } else { - i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); - i386_cltd(); + i386_mov_membase_reg(cd, REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8 + 4); + +/* } else { */ +/* i386_mov_membase_reg(cd, REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, EAX); */ +/* i386_cltd(cd); */ +/* i386_mov_reg_membase(cd, EAX, REG_SP, p * 8); */ +/* i386_mov_reg_membase(cd, EDX, REG_SP, p * 8 + 4); */ } - i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4); } else { - if (t == TYPE_FLT) { - i386_flds_membase(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4); - i386_fstps_membase(REG_SP, p * 8); - i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4); + if (!IS_2_WORD_TYPE(t)) { + i386_flds_membase(cd, REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4); + i386_fstps_membase(cd, REG_SP, p * 8); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8 + 4); } else { - i386_fldl_membase(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4); - i386_fstpl_membase(REG_SP, p * 8); + i386_fldl_membase(cd, REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4); + i386_fstpl_membase(cd, REG_SP, p * 8); } } } /* fill up the remaining arguments */ - i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1); - for (p = mparamcount; p < TRACE_ARGS_NUM; p++) { - i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8); - i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8 + 4); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); + for (p = m->paramcount; p < TRACE_ARGS_NUM; p++) { + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8 + 4); } - i386_mov_imm_membase((s4) method, REG_SP, TRACE_ARGS_NUM * 8); - - i386_mov_imm_reg((s4) builtin_trace_args, REG_ITMP1); -/* i386_mov_imm_reg(asm_builtin_trace, REG_ITMP1); */ - i386_call_reg(REG_ITMP1); + i386_mov_imm_membase(cd, (s4) m, REG_SP, TRACE_ARGS_NUM * 8); + i386_mov_imm_reg(cd, (s4) builtin_trace_args, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); - i386_alu_imm_reg(I386_ADD, TRACE_ARGS_NUM * 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_ADD, TRACE_ARGS_NUM * 8 + 4, REG_SP); } /* take arguments out of register or stack frame */ - for (p = 0, l = 0; p < mparamcount; p++) { - t = mparamtypes[p]; - var = &(locals[l][t]); + for (p = 0, l = 0; p < m->paramcount; p++) { + t = m->paramtypes[p]; + var = &(rd->locals[l][t]); l++; if (IS_2_WORD_TYPE(t)) /* increment local counter for 2 word types */ l++; if (var->type < 0) continue; - r = var->regoff; if (IS_INT_LNG_TYPE(t)) { /* integer args */ - if (p < intreg_argnum) { /* register arguments */ + if (p < rd->intreg_argnum) { /* register arguments */ panic("integer register argument"); if (!(var->flags & INMEMORY)) { /* reg arg -> register */ /* M_INTMOVE (argintregs[p], r); */ @@ -623,25 +458,25 @@ void codegen() /* M_LST (argintregs[p], REG_SP, 8 * r); */ } } else { /* stack arguments */ - pa = p - intreg_argnum; + pa = p - rd->intreg_argnum; if (!(var->flags & INMEMORY)) { /* stack arg -> register */ - i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, r); /* + 4 for return address */ + i386_mov_membase_reg(cd, REG_SP, (parentargs_base + pa) * 8 + 4, var->regoff); /* + 4 for return address */ } else { /* stack arg -> spilled */ if (!IS_2_WORD_TYPE(t)) { - i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); /* + 4 for return address */ - i386_mov_reg_membase(REG_ITMP1, REG_SP, r * 8); + i386_mov_membase_reg(cd, REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); /* + 4 for return address */ + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, var->regoff * 8); } else { - i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); /* + 4 for return address */ - i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4 + 4, REG_ITMP2); /* + 4 for return address */ - i386_mov_reg_membase(REG_ITMP1, REG_SP, r * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, r * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); /* + 4 for return address */ + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, var->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, (parentargs_base + pa) * 8 + 4 + 4, REG_ITMP1); /* + 4 for return address */ + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, var->regoff * 8 + 4); } } } } else { /* floating args */ - if (p < fltreg_argnum) { /* register arguments */ + if (p < rd->fltreg_argnum) { /* register arguments */ if (!(var->flags & INMEMORY)) { /* reg arg -> register */ panic("There are no float argument registers!"); @@ -650,57 +485,45 @@ void codegen() } } else { /* stack arguments */ - pa = p - fltreg_argnum; + pa = p - rd->fltreg_argnum; if (!(var->flags & INMEMORY)) { /* stack-arg -> register */ if (t == TYPE_FLT) { - i386_flds_membase(REG_SP, (parentargs_base + pa) * 8 + 4); + i386_flds_membase(cd, REG_SP, (parentargs_base + pa) * 8 + 4); fpu_st_offset++; - i386_fstp_reg(r + fpu_st_offset); + i386_fstp_reg(cd, var->regoff + fpu_st_offset); fpu_st_offset--; } else { - i386_fldl_membase(REG_SP, (parentargs_base + pa) * 8 + 4); + i386_fldl_membase(cd, REG_SP, (parentargs_base + pa) * 8 + 4); fpu_st_offset++; - i386_fstp_reg(r + fpu_st_offset); + i386_fstp_reg(cd, var->regoff + fpu_st_offset); fpu_st_offset--; } } else { /* stack-arg -> spilled */ -/* i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); */ -/* i386_mov_reg_membase(REG_ITMP1, REG_SP, r * 8); */ +/* i386_mov_membase_reg(cd, REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); */ +/* i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, r * 8); */ if (t == TYPE_FLT) { - i386_flds_membase(REG_SP, (parentargs_base + pa) * 8 + 4); - i386_fstps_membase(REG_SP, r * 8); + i386_flds_membase(cd, REG_SP, (parentargs_base + pa) * 8 + 4); + i386_fstps_membase(cd, REG_SP, var->regoff * 8); } else { - i386_fldl_membase(REG_SP, (parentargs_base + pa) * 8 + 4); - i386_fstpl_membase(REG_SP, r * 8); + i386_fldl_membase(cd, REG_SP, (parentargs_base + pa) * 8 + 4); + i386_fstpl_membase(cd, REG_SP, var->regoff * 8); } } } } } /* end for */ - /* call monitorenter function */ - -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - i386_mov_membase_reg(REG_SP, maxmemuse * 8, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 4, REG_SP); - i386_mov_reg_membase(REG_ITMP1, REG_SP, 0); - i386_mov_imm_reg((s4) builtin_monitorenter, REG_ITMP2); - i386_call_reg(REG_ITMP2); - i386_alu_imm_reg(I386_ADD, 4, REG_SP); - } -#endif } /* end of header generation */ /* walk through all basic blocks */ - for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) { + for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) { - bptr->mpc = (int)((u1*) mcodeptr - mcodebase); + bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase); if (bptr->flags >= BBREACHED) { @@ -708,8 +531,9 @@ void codegen() branchref *brefs; for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) { - gen_resolvebranch((u1*) mcodebase + brefs->branchpos, - brefs->branchpos, bptr->mpc); + gen_resolvebranch(cd->mcodebase + brefs->branchpos, + brefs->branchpos, + bptr->mpc); } /* copy interface registers to their destination */ @@ -717,17 +541,49 @@ void codegen() src = bptr->instack; len = bptr->indepth; MCODECHECK(64+len); + +#ifdef LSRA + if (opt_lsra) { while (src != NULL) { len--; if ((len == 0) && (bptr->type != BBTYPE_STD)) { if (!IS_2_WORD_TYPE(src->type)) { if (bptr->type == BBTYPE_SBR) { - d = reg_of_var(src, REG_ITMP1); - i386_pop_reg(d); + /* d = reg_of_var(m, src, REG_ITMP1); */ + if (!(src->flags & INMEMORY)) + d= src->regoff; + else + d=REG_ITMP1; + i386_pop_reg(cd, d); store_reg_to_var_int(src, d); + } else if (bptr->type == BBTYPE_EXH) { + /* d = reg_of_var(m, src, REG_ITMP1); */ + if (!(src->flags & INMEMORY)) + d= src->regoff; + else + d=REG_ITMP1; + M_INTMOVE(REG_ITMP1, d); + store_reg_to_var_int(src, d); + } + } else { + panic("copy interface registers(EXH, SBR): longs have to me in memory (begin 1)"); + } + } + src = src->prev; + } + } else { +#endif + while (src != NULL) { + len--; + if ((len == 0) && (bptr->type != BBTYPE_STD)) { + if (!IS_2_WORD_TYPE(src->type)) { + if (bptr->type == BBTYPE_SBR) { + d = reg_of_var(rd, src, REG_ITMP1); + i386_pop_reg(cd, d); + store_reg_to_var_int(src, d); } else if (bptr->type == BBTYPE_EXH) { - d = reg_of_var(src, REG_ITMP1); + d = reg_of_var(rd, src, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); store_reg_to_var_int(src, d); } @@ -737,37 +593,37 @@ void codegen() } } else { - d = reg_of_var(src, REG_ITMP1); + d = reg_of_var(rd, src, REG_ITMP1); if ((src->varkind != STACKVAR)) { s2 = src->type; if (IS_FLT_DBL_TYPE(s2)) { - s1 = interfaces[len][s2].regoff; - if (!(interfaces[len][s2].flags & INMEMORY)) { + s1 = rd->interfaces[len][s2].regoff; + if (!(rd->interfaces[len][s2].flags & INMEMORY)) { M_FLTMOVE(s1, d); } else { if (s2 == TYPE_FLT) { - i386_flds_membase(REG_SP, s1 * 8); + i386_flds_membase(cd, REG_SP, s1 * 8); } else { - i386_fldl_membase(REG_SP, s1 * 8); + i386_fldl_membase(cd, REG_SP, s1 * 8); } } store_reg_to_var_flt(src, d); } else { - s1 = interfaces[len][s2].regoff; - if (!IS_2_WORD_TYPE(interfaces[len][s2].type)) { - if (!(interfaces[len][s2].flags & INMEMORY)) { + s1 = rd->interfaces[len][s2].regoff; + if (!IS_2_WORD_TYPE(rd->interfaces[len][s2].type)) { + if (!(rd->interfaces[len][s2].flags & INMEMORY)) { M_INTMOVE(s1, d); } else { - i386_mov_membase_reg(REG_SP, s1 * 8, d); + i386_mov_membase_reg(cd, REG_SP, s1 * 8, d); } store_reg_to_var_int(src, d); } else { - if (interfaces[len][s2].flags & INMEMORY) { + if (rd->interfaces[len][s2].flags & INMEMORY) { M_LNGMEMMOVE(s1, src->regoff); } else { @@ -779,30 +635,36 @@ void codegen() } src = src->prev; } +#ifdef LSRA + } +#endif /* walk through all instructions */ src = bptr->instack; len = bptr->icount; - for (iptr = bptr->iinstr; - len > 0; - src = iptr->dst, len--, iptr++) { + currentline = 0; + for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) { + if (iptr->line != currentline) { + dseg_addlinenumber(cd, iptr->line, cd->mcodeptr); + currentline = iptr->line; + } - MCODECHECK(64); /* an instruction usually needs < 64 words */ - switch (iptr->opc) { + MCODECHECK(64); /* an instruction usually needs < 64 words */ + switch (iptr->opc) { case ICMD_NOP: /* ... ==> ... */ break; case ICMD_NULLCHECKPOP: /* ..., objectref ==> ... */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8); } else { - i386_test_reg_reg(src->regoff, src->regoff); + i386_test_reg_reg(cd, src->regoff, src->regoff); } - i386_jcc(I386_CC_E, 0); - codegen_addxnullrefs(mcodeptr); + i386_jcc(cd, I386_CC_E, 0); + codegen_addxnullrefs(cd, cd->mcodeptr); break; /* constant operations ************************************************/ @@ -810,16 +672,16 @@ void codegen() case ICMD_ICONST: /* ... ==> ..., constant */ /* op1 = 0, val.i = constant */ - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->dst->flags & INMEMORY) { - i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8); + i386_mov_imm_membase(cd, iptr->val.i, REG_SP, iptr->dst->regoff * 8); } else { if (iptr->val.i == 0) { - i386_alu_reg_reg(I386_XOR, d, d); + i386_alu_reg_reg(cd, I386_XOR, d, d); } else { - i386_mov_imm_reg(iptr->val.i, d); + i386_mov_imm_reg(cd, iptr->val.i, d); } } break; @@ -827,10 +689,10 @@ void codegen() case ICMD_LCONST: /* ... ==> ..., constant */ /* op1 = 0, val.l = constant */ - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->dst->flags & INMEMORY) { - i386_mov_imm_membase(iptr->val.l, REG_SP, iptr->dst->regoff * 8); - i386_mov_imm_membase(iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_imm_membase(cd, iptr->val.l, REG_SP, iptr->dst->regoff * 8); + i386_mov_imm_membase(cd, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); } else { panic("LCONST: longs have to be in memory"); @@ -840,31 +702,31 @@ void codegen() case ICMD_FCONST: /* ... ==> ..., constant */ /* op1 = 0, val.f = constant */ - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if (iptr->val.f == 0.0) { - i386_fldz(); + i386_fldz(cd); fpu_st_offset++; /* -0.0 */ if (iptr->val.i == 0x80000000) { - i386_fchs(); + i386_fchs(cd); } } else if (iptr->val.f == 1.0) { - i386_fld1(); + i386_fld1(cd); fpu_st_offset++; } else if (iptr->val.f == 2.0) { - i386_fld1(); - i386_fld1(); - i386_faddp(); + i386_fld1(cd); + i386_fld1(cd); + i386_faddp(cd); fpu_st_offset++; } else { - a = dseg_addfloat(iptr->val.f); - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_flds_membase(REG_ITMP1, a); + a = dseg_addfloat(cd, iptr->val.f); + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_flds_membase(cd, REG_ITMP1, a); fpu_st_offset++; } store_reg_to_var_flt(iptr->dst, d); @@ -873,31 +735,31 @@ void codegen() case ICMD_DCONST: /* ... ==> ..., constant */ /* op1 = 0, val.d = constant */ - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if (iptr->val.d == 0.0) { - i386_fldz(); + i386_fldz(cd); fpu_st_offset++; /* -0.0 */ if (iptr->val.l == 0x8000000000000000LL) { - i386_fchs(); + i386_fchs(cd); } } else if (iptr->val.d == 1.0) { - i386_fld1(); + i386_fld1(cd); fpu_st_offset++; } else if (iptr->val.d == 2.0) { - i386_fld1(); - i386_fld1(); - i386_faddp(); + i386_fld1(cd); + i386_fld1(cd); + i386_faddp(cd); fpu_st_offset++; } else { - a = dseg_adddouble(iptr->val.d); - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_fldl_membase(REG_ITMP1, a); + a = dseg_adddouble(cd, iptr->val.d); + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_fldl_membase(cd, REG_ITMP1, a); fpu_st_offset++; } store_reg_to_var_flt(iptr->dst, d); @@ -906,16 +768,16 @@ void codegen() case ICMD_ACONST: /* ... ==> ..., constant */ /* op1 = 0, val.a = constant */ - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->dst->flags & INMEMORY) { - i386_mov_imm_membase((s4) iptr->val.a, REG_SP, iptr->dst->regoff * 8); + i386_mov_imm_membase(cd, (s4) iptr->val.a, REG_SP, iptr->dst->regoff * 8); } else { if ((s4) iptr->val.a == 0) { - i386_alu_reg_reg(I386_XOR, d, d); + i386_alu_reg_reg(cd, I386_XOR, d, d); } else { - i386_mov_imm_reg((s4) iptr->val.a, d); + i386_mov_imm_reg(cd, (s4) iptr->val.a, d); } } break; @@ -926,24 +788,24 @@ void codegen() case ICMD_ILOAD: /* ... ==> ..., content of local variable */ case ICMD_ALOAD: /* op1 = local variable */ - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if ((iptr->dst->varkind == LOCALVAR) && (iptr->dst->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]); if (iptr->dst->flags & INMEMORY) { if (var->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, var->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, var->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_reg_membase(var->regoff, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, var->regoff, REG_SP, iptr->dst->regoff * 8); } } else { if (var->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, var->regoff * 8, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, var->regoff * 8, iptr->dst->regoff); } else { M_INTMOVE(var->regoff, iptr->dst->regoff); @@ -954,12 +816,12 @@ void codegen() case ICMD_LLOAD: /* ... ==> ..., content of local variable */ /* op1 = local variable */ - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if ((iptr->dst->varkind == LOCALVAR) && (iptr->dst->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]); if (iptr->dst->flags & INMEMORY) { if (var->flags & INMEMORY) { M_LNGMEMMOVE(var->regoff, iptr->dst->regoff); @@ -976,17 +838,17 @@ void codegen() case ICMD_FLOAD: /* ... ==> ..., content of local variable */ /* op1 = local variable */ - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if ((iptr->dst->varkind == LOCALVAR) && (iptr->dst->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]); if (var->flags & INMEMORY) { - i386_flds_membase(REG_SP, var->regoff * 8); + i386_flds_membase(cd, REG_SP, var->regoff * 8); fpu_st_offset++; } else { - i386_fld_reg(var->regoff + fpu_st_offset); + i386_fld_reg(cd, var->regoff + fpu_st_offset); fpu_st_offset++; } store_reg_to_var_flt(iptr->dst, d); @@ -995,17 +857,17 @@ void codegen() case ICMD_DLOAD: /* ... ==> ..., content of local variable */ /* op1 = local variable */ - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if ((iptr->dst->varkind == LOCALVAR) && (iptr->dst->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]); if (var->flags & INMEMORY) { - i386_fldl_membase(REG_SP, var->regoff * 8); + i386_fldl_membase(cd, REG_SP, var->regoff * 8); fpu_st_offset++; } else { - i386_fld_reg(var->regoff + fpu_st_offset); + i386_fld_reg(cd, var->regoff + fpu_st_offset); fpu_st_offset++; } store_reg_to_var_flt(iptr->dst, d); @@ -1018,14 +880,14 @@ void codegen() (src->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]); if (var->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, var->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, var->regoff * 8); } else { - i386_mov_reg_membase(src->regoff, REG_SP, var->regoff * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, var->regoff * 8); } } else { @@ -1041,7 +903,7 @@ void codegen() (src->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]); if (var->flags & INMEMORY) { if (src->flags & INMEMORY) { M_LNGMEMMOVE(src->regoff, var->regoff); @@ -1062,15 +924,15 @@ void codegen() (src->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]); if (var->flags & INMEMORY) { var_to_reg_flt(s1, src, REG_FTMP1); - i386_fstps_membase(REG_SP, var->regoff * 8); + i386_fstps_membase(cd, REG_SP, var->regoff * 8); fpu_st_offset--; } else { var_to_reg_flt(s1, src, var->regoff); /* M_FLTMOVE(s1, var->regoff); */ - i386_fstp_reg(var->regoff + fpu_st_offset); + i386_fstp_reg(cd, var->regoff + fpu_st_offset); fpu_st_offset--; } break; @@ -1082,15 +944,15 @@ void codegen() (src->varnum == iptr->op1)) { break; } - var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]); + var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]); if (var->flags & INMEMORY) { var_to_reg_flt(s1, src, REG_FTMP1); - i386_fstpl_membase(REG_SP, var->regoff * 8); + i386_fstpl_membase(cd, REG_SP, var->regoff * 8); fpu_st_offset--; } else { var_to_reg_flt(s1, src, var->regoff); /* M_FLTMOVE(s1, var->regoff); */ - i386_fstp_reg(var->regoff + fpu_st_offset); + i386_fstp_reg(cd, var->regoff + fpu_st_offset); fpu_st_offset--; } break; @@ -1104,60 +966,38 @@ void codegen() case ICMD_POP2: /* ..., value, value ==> ... */ break; -#define M_COPY(from,to) \ - d = reg_of_var(to, REG_ITMP1); \ - if ((from->regoff != to->regoff) || \ - ((from->flags ^ to->flags) & INMEMORY)) { \ - if (IS_FLT_DBL_TYPE(from->type)) { \ - var_to_reg_flt(s1, from, d); \ -/* M_FLTMOVE(s1, d);*/ \ - store_reg_to_var_flt(to, d); \ - } else { \ - if (!IS_2_WORD_TYPE(from->type)) { \ - if (to->flags & INMEMORY) { \ - if (from->flags & INMEMORY) { \ - i386_mov_membase_reg(REG_SP, from->regoff * 8, REG_ITMP1); \ - i386_mov_reg_membase(REG_ITMP1, REG_SP, to->regoff * 8); \ - } else { \ - i386_mov_reg_membase(from->regoff, REG_SP, to->regoff * 8); \ - } \ - } else { \ - if (from->flags & INMEMORY) { \ - i386_mov_membase_reg(REG_SP, from->regoff * 8, to->regoff); \ - } else { \ - i386_mov_reg_reg(from->regoff, to->regoff); \ - } \ - } \ - } else { \ - M_LNGMEMMOVE(from->regoff, to->regoff); \ - } \ - } \ - } - case ICMD_DUP: /* ..., a ==> ..., a, a */ M_COPY(src, iptr->dst); break; - case ICMD_DUP_X1: /* ..., a, b ==> ..., b, a, b */ - - M_COPY(src, iptr->dst->prev->prev); - case ICMD_DUP2: /* ..., a, b ==> ..., a, b, a, b */ M_COPY(src, iptr->dst); M_COPY(src->prev, iptr->dst->prev); break; - case ICMD_DUP2_X1: /* ..., a, b, c ==> ..., b, c, a, b, c */ + case ICMD_DUP_X1: /* ..., a, b ==> ..., b, a, b */ - M_COPY(src->prev, iptr->dst->prev->prev->prev); + M_COPY(src, iptr->dst); + M_COPY(src->prev, iptr->dst->prev); + M_COPY(iptr->dst, iptr->dst->prev->prev); + break; case ICMD_DUP_X2: /* ..., a, b, c ==> ..., c, a, b, c */ M_COPY(src, iptr->dst); M_COPY(src->prev, iptr->dst->prev); M_COPY(src->prev->prev, iptr->dst->prev->prev); - M_COPY(src, iptr->dst->prev->prev->prev); + M_COPY(iptr->dst, iptr->dst->prev->prev->prev); + break; + + case ICMD_DUP2_X1: /* ..., a, b, c ==> ..., b, c, a, b, c */ + + M_COPY(src, iptr->dst); + M_COPY(src->prev, iptr->dst->prev); + M_COPY(src->prev->prev, iptr->dst->prev->prev); + M_COPY(iptr->dst, iptr->dst->prev->prev->prev); + M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev); break; case ICMD_DUP2_X2: /* ..., a, b, c, d ==> ..., c, d, a, b, c, d */ @@ -1166,13 +1006,13 @@ void codegen() M_COPY(src->prev, iptr->dst->prev); M_COPY(src->prev->prev, iptr->dst->prev->prev); M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev); - M_COPY(src, iptr->dst->prev->prev->prev->prev); - M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev); + M_COPY(iptr->dst, iptr->dst->prev->prev->prev->prev); + M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev->prev); break; case ICMD_SWAP: /* ..., a, b ==> ..., b, a */ - M_COPY(src, iptr->dst->prev); + M_COPY(src, iptr->dst->prev); M_COPY(src->prev, iptr->dst); break; @@ -1181,53 +1021,53 @@ void codegen() case ICMD_INEG: /* ..., value ==> ..., - value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (src->regoff == iptr->dst->regoff) { - i386_neg_membase(REG_SP, iptr->dst->regoff * 8); + i386_neg_membase(cd, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_neg_reg(REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_neg_reg(cd, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { - i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8); - i386_neg_membase(REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8); + i386_neg_membase(cd, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); - i386_neg_reg(iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_neg_reg(cd, iptr->dst->regoff); } else { M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_neg_reg(iptr->dst->regoff); + i386_neg_reg(cd, iptr->dst->regoff); } } break; case ICMD_LNEG: /* ..., value ==> ..., - value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (src->regoff == iptr->dst->regoff) { - i386_neg_membase(REG_SP, iptr->dst->regoff * 8); - i386_alu_imm_membase(I386_ADC, 0, REG_SP, iptr->dst->regoff * 8 + 4); - i386_neg_membase(REG_SP, iptr->dst->regoff * 8 + 4); + i386_neg_membase(cd, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_ADC, 0, REG_SP, iptr->dst->regoff * 8 + 4); + i386_neg_membase(cd, REG_SP, iptr->dst->regoff * 8 + 4); } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_neg_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2); - i386_neg_reg(REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_neg_reg(cd, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADC, 0, REG_ITMP1); + i386_neg_reg(cd, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } } } @@ -1235,126 +1075,126 @@ void codegen() case ICMD_I2L: /* ..., value ==> ..., value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_EAX); - i386_cltd(); - i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(I386_EDX, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, EAX); + i386_cltd(cd); + i386_mov_reg_membase(cd, EAX, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, EDX, REG_SP, iptr->dst->regoff * 8 + 4); } else { - M_INTMOVE(src->regoff, I386_EAX); - i386_cltd(); - i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(I386_EDX, REG_SP, iptr->dst->regoff * 8 + 4); + M_INTMOVE(src->regoff, EAX); + i386_cltd(cd); + i386_mov_reg_membase(cd, EAX, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, EDX, REG_SP, iptr->dst->regoff * 8 + 4); } } break; case ICMD_L2I: /* ..., value ==> ..., value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } } break; case ICMD_INT2BYTE: /* ..., value ==> ..., value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_shift_imm_reg(I386_SHL, 24, REG_ITMP1); - i386_shift_imm_reg(I386_SAR, 24, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SHL, 24, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SAR, 24, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8); - i386_shift_imm_membase(I386_SHL, 24, REG_SP, iptr->dst->regoff * 8); - i386_shift_imm_membase(I386_SAR, 24, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8); + i386_shift_imm_membase(cd, I386_SHL, 24, REG_SP, iptr->dst->regoff * 8); + i386_shift_imm_membase(cd, I386_SAR, 24, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); - i386_shift_imm_reg(I386_SHL, 24, iptr->dst->regoff); - i386_shift_imm_reg(I386_SAR, 24, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SHL, 24, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SAR, 24, iptr->dst->regoff); } else { M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_shift_imm_reg(I386_SHL, 24, iptr->dst->regoff); - i386_shift_imm_reg(I386_SAR, 24, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SHL, 24, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SAR, 24, iptr->dst->regoff); } } break; case ICMD_INT2CHAR: /* ..., value ==> ..., value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (src->regoff == iptr->dst->regoff) { - i386_alu_imm_membase(I386_AND, 0x0000ffff, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_AND, 0x0000ffff, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_imm_reg(I386_AND, 0x0000ffff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_imm_reg(cd, I386_AND, 0x0000ffff, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { - i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8); - i386_alu_imm_membase(I386_AND, 0x0000ffff, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_AND, 0x0000ffff, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); - i386_alu_imm_reg(I386_AND, 0x0000ffff, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_alu_imm_reg(cd, I386_AND, 0x0000ffff, iptr->dst->regoff); } else { M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_alu_imm_reg(I386_AND, 0x0000ffff, iptr->dst->regoff); + i386_alu_imm_reg(cd, I386_AND, 0x0000ffff, iptr->dst->regoff); } } break; case ICMD_INT2SHORT: /* ..., value ==> ..., value */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_shift_imm_reg(I386_SHL, 16, REG_ITMP1); - i386_shift_imm_reg(I386_SAR, 16, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SHL, 16, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SAR, 16, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8); - i386_shift_imm_membase(I386_SHL, 16, REG_SP, iptr->dst->regoff * 8); - i386_shift_imm_membase(I386_SAR, 16, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8); + i386_shift_imm_membase(cd, I386_SHL, 16, REG_SP, iptr->dst->regoff * 8); + i386_shift_imm_membase(cd, I386_SAR, 16, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); - i386_shift_imm_reg(I386_SHL, 16, iptr->dst->regoff); - i386_shift_imm_reg(I386_SAR, 16, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SHL, 16, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SAR, 16, iptr->dst->regoff); } else { M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_shift_imm_reg(I386_SHL, 16, iptr->dst->regoff); - i386_shift_imm_reg(I386_SAR, 16, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SHL, 16, iptr->dst->regoff); + i386_shift_imm_reg(cd, I386_SAR, 16, iptr->dst->regoff); } } break; @@ -1362,42 +1202,41 @@ void codegen() case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialu(I386_ADD, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialu(cd, I386_ADD, src, iptr); break; case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - /* should we use a inc optimization for smaller code size? */ - i386_emit_ialuconst(I386_ADD, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialuconst(cd, I386_ADD, src, iptr); break; case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_membase(I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(I386_ADC, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_reg_membase(cd, I386_ADC, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } else if (src->prev->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_membase(I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(I386_ADC, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_alu_reg_membase(cd, I386_ADC, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_membase_reg(I386_ADD, REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_ADC, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_ADD, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_membase_reg(cd, I386_ADC, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } } @@ -1407,20 +1246,20 @@ void codegen() case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (src->regoff == iptr->dst->regoff) { - i386_alu_imm_membase(I386_ADD, iptr->val.l, REG_SP, iptr->dst->regoff * 8); - i386_alu_imm_membase(I386_ADC, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); + i386_alu_imm_membase(cd, I386_ADD, iptr->val.l, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_ADC, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_imm_reg(I386_ADD, iptr->val.l, REG_ITMP1); - i386_alu_imm_reg(I386_ADC, iptr->val.l >> 32, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADD, iptr->val.l, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADC, iptr->val.l >> 32, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } } } @@ -1428,70 +1267,70 @@ void codegen() case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, REG_ITMP1); - i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_alu_membase_reg(cd, I386_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - i386_alu_reg_membase(I386_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); + i386_alu_reg_membase(cd, I386_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_reg_reg(I386_SUB, src->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_reg_reg(cd, I386_SUB, src->regoff, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { - i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(I386_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8); + i386_alu_reg_membase(cd, I386_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, d); - i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, d); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); + i386_alu_membase_reg(cd, I386_SUB, REG_SP, src->regoff * 8, d); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, d); - i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, d); + i386_alu_membase_reg(cd, I386_SUB, REG_SP, src->regoff * 8, d); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { /* workaround for reg alloc */ if (src->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_reg_reg(I386_SUB, src->regoff, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_reg_reg(cd, I386_SUB, src->regoff, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, d); - i386_alu_reg_reg(I386_SUB, src->regoff, d); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d); + i386_alu_reg_reg(cd, I386_SUB, src->regoff, d); } } else { /* workaround for reg alloc */ if (src->regoff == iptr->dst->regoff) { M_INTMOVE(src->prev->regoff, REG_ITMP1); - i386_alu_reg_reg(I386_SUB, src->regoff, REG_ITMP1); + i386_alu_reg_reg(cd, I386_SUB, src->regoff, REG_ITMP1); M_INTMOVE(REG_ITMP1, d); } else { M_INTMOVE(src->prev->regoff, d); - i386_alu_reg_reg(I386_SUB, src->regoff, d); + i386_alu_reg_reg(cd, I386_SUB, src->regoff, d); } } } @@ -1500,28 +1339,28 @@ void codegen() case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialuconst(I386_SUB, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialuconst(cd, I386_SUB, src, iptr); break; case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { if (src->prev->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_membase(I386_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(I386_SBB, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_alu_reg_membase(cd, I386_SBB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_SBB, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_SUB, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_membase_reg(cd, I386_SBB, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } } } @@ -1530,21 +1369,21 @@ void codegen() case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { if (src->regoff == iptr->dst->regoff) { - i386_alu_imm_membase(I386_SUB, iptr->val.l, REG_SP, iptr->dst->regoff * 8); - i386_alu_imm_membase(I386_SBB, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); + i386_alu_imm_membase(cd, I386_SUB, iptr->val.l, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_SBB, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); } else { /* TODO: could be size optimized with lea -- see gcc output */ - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_imm_reg(I386_SUB, iptr->val.l, REG_ITMP1); - i386_alu_imm_reg(I386_SBB, iptr->val.l >> 32, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_imm_reg(cd, I386_SUB, iptr->val.l, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_alu_imm_reg(cd, I386_SBB, iptr->val.l >> 32, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); } } } @@ -1552,49 +1391,49 @@ void codegen() case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_imul_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_imul_reg_reg(src->prev->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_imul_reg_reg(cd, src->prev->regoff, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_imul_reg_reg(src->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_imul_reg_reg(cd, src->regoff, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - i386_mov_reg_reg(src->prev->regoff, REG_ITMP1); - i386_imul_reg_reg(src->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_reg(cd, src->prev->regoff, REG_ITMP1); + i386_imul_reg_reg(cd, src->regoff, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff); - i386_imul_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - i386_imul_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_imul_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff); + i386_imul_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); } else { if (src->regoff == iptr->dst->regoff) { - i386_imul_reg_reg(src->prev->regoff, iptr->dst->regoff); + i386_imul_reg_reg(cd, src->prev->regoff, iptr->dst->regoff); } else { M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - i386_imul_reg_reg(src->regoff, iptr->dst->regoff); + i386_imul_reg_reg(cd, src->regoff, iptr->dst->regoff); } } } @@ -1603,48 +1442,48 @@ void codegen() case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_imul_imm_membase_reg(iptr->val.i, REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_imul_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } else { - i386_imul_imm_reg_reg(iptr->val.i, src->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_imul_imm_reg_reg(cd, iptr->val.i, src->regoff, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); } } else { if (src->flags & INMEMORY) { - i386_imul_imm_membase_reg(iptr->val.i, REG_SP, src->regoff * 8, iptr->dst->regoff); + i386_imul_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, iptr->dst->regoff); } else { - i386_imul_imm_reg_reg(iptr->val.i, src->regoff, iptr->dst->regoff); + i386_imul_imm_reg_reg(cd, iptr->val.i, src->regoff, iptr->dst->regoff); } } break; case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, I386_EAX); /* mem -> EAX */ + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, EAX); /* mem -> EAX */ /* optimize move EAX -> REG_ITMP3 is slower??? */ -/* i386_mov_reg_reg(I386_EAX, REG_ITMP3); */ - i386_mul_membase(REG_SP, src->regoff * 8); /* mem * EAX -> EDX:EAX */ +/* i386_mov_reg_reg(cd, EAX, REG_ITMP3); */ + i386_mul_membase(cd, REG_SP, src->regoff * 8); /* mem * EAX -> EDX:EAX */ /* TODO: optimize move EAX -> REG_ITMP3 */ - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); /* mem -> ITMP3 */ - i386_imul_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */ - i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */ + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); /* mem -> ITMP3 */ + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP2); /* mem * ITMP3 -> ITMP3 */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP2, EDX); /* ITMP3 + EDX -> EDX */ - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP3); /* mem -> ITMP3 */ - i386_imul_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */ + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP2); /* mem -> ITMP3 */ + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); /* mem * ITMP3 -> ITMP3 */ - i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */ - i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(I386_EDX, REG_SP, iptr->dst->regoff * 8 + 4); + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP2, EDX); /* ITMP3 + EDX -> EDX */ + i386_mov_reg_membase(cd, EAX, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, EDX, REG_SP, iptr->dst->regoff * 8 + 4); } } break; @@ -1652,91 +1491,80 @@ void codegen() case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { - i386_mov_imm_reg(iptr->val.l, I386_EAX); /* imm -> EAX */ - i386_mul_membase(REG_SP, src->regoff * 8); /* mem * EAX -> EDX:EAX */ + i386_mov_imm_reg(cd, iptr->val.l, EAX); /* imm -> EAX */ + i386_mul_membase(cd, REG_SP, src->regoff * 8); /* mem * EAX -> EDX:EAX */ /* TODO: optimize move EAX -> REG_ITMP3 */ - i386_mov_imm_reg(iptr->val.l >> 32, REG_ITMP3); /* imm -> ITMP3 */ - i386_imul_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */ + i386_mov_imm_reg(cd, iptr->val.l >> 32, REG_ITMP2); /* imm -> ITMP3 */ + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP2); /* mem * ITMP3 -> ITMP3 */ - i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */ - i386_mov_imm_reg(iptr->val.l, REG_ITMP3); /* imm -> ITMP3 */ - i386_imul_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP2, EDX); /* ITMP3 + EDX -> EDX */ + i386_mov_imm_reg(cd, iptr->val.l, REG_ITMP2); /* imm -> ITMP3 */ + i386_imul_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); /* mem * ITMP3 -> ITMP3 */ - i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */ - i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(I386_EDX, REG_SP, iptr->dst->regoff * 8 + 4); + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP2, EDX); /* ITMP3 + EDX -> EDX */ + i386_mov_reg_membase(cd, EAX, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, EDX, REG_SP, iptr->dst->regoff * 8 + 4); } } break; -#define gen_div_check(v) \ - if (checknull) { \ - if ((v)->flags & INMEMORY) { \ - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); \ - } else { \ - i386_test_reg_reg(src->regoff, src->regoff); \ - } \ - i386_jcc(I386_CC_E, 0); \ - codegen_addxdivrefs(mcodeptr); \ - } - case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - var_to_reg_int(s1, src, REG_ITMP3); + d = reg_of_var(rd, iptr->dst, REG_NULL); + var_to_reg_int(s1, src, REG_ITMP2); gen_div_check(src); if (src->prev->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, I386_EAX); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, EAX); } else { - M_INTMOVE(src->prev->regoff, I386_EAX); + M_INTMOVE(src->prev->regoff, EAX); } - i386_alu_imm_reg(I386_CMP, 0x80000000, I386_EAX); /* check as described in jvm spec */ - i386_jcc(I386_CC_NE, 3 + 6); - i386_alu_imm_reg(I386_CMP, -1, s1); - i386_jcc(I386_CC_E, 1 + 2); + i386_alu_imm_reg(cd, I386_CMP, 0x80000000, EAX); /* check as described in jvm spec */ + i386_jcc(cd, I386_CC_NE, 3 + 6); + i386_alu_imm_reg(cd, I386_CMP, -1, s1); + i386_jcc(cd, I386_CC_E, 1 + 2); - i386_cltd(); - i386_idiv_reg(s1); + i386_cltd(cd); + i386_idiv_reg(cd, s1); if (iptr->dst->flags & INMEMORY) { - i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, EAX, REG_SP, iptr->dst->regoff * 8); } else { - M_INTMOVE(I386_EAX, iptr->dst->regoff); + M_INTMOVE(EAX, iptr->dst->regoff); } break; case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - var_to_reg_int(s1, src, REG_ITMP3); + d = reg_of_var(rd, iptr->dst, REG_NULL); + var_to_reg_int(s1, src, REG_ITMP2); gen_div_check(src); if (src->prev->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, I386_EAX); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, EAX); } else { - M_INTMOVE(src->prev->regoff, I386_EAX); + M_INTMOVE(src->prev->regoff, EAX); } - i386_alu_imm_reg(I386_CMP, 0x80000000, I386_EAX); /* check as described in jvm spec */ - i386_jcc(I386_CC_NE, 2 + 3 + 6); - i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EDX); - i386_alu_imm_reg(I386_CMP, -1, s1); - i386_jcc(I386_CC_E, 1 + 2); + i386_alu_imm_reg(cd, I386_CMP, 0x80000000, EAX); /* check as described in jvm spec */ + i386_jcc(cd, I386_CC_NE, 2 + 3 + 6); + i386_alu_reg_reg(cd, I386_XOR, EDX, EDX); + i386_alu_imm_reg(cd, I386_CMP, -1, s1); + i386_jcc(cd, I386_CC_E, 1 + 2); - i386_cltd(); - i386_idiv_reg(s1); + i386_cltd(cd); + i386_idiv_reg(cd, s1); if (iptr->dst->flags & INMEMORY) { - i386_mov_reg_membase(I386_EDX, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, EDX, REG_SP, iptr->dst->regoff * 8); } else { - M_INTMOVE(I386_EDX, iptr->dst->regoff); + M_INTMOVE(EDX, iptr->dst->regoff); } break; @@ -1745,40 +1573,40 @@ void codegen() /* TODO: optimize for `/ 2' */ var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); M_INTMOVE(s1, d); - i386_test_reg_reg(d, d); + i386_test_reg_reg(cd, d, d); a = 2; CALCIMMEDIATEBYTES(a, (1 << iptr->val.i) - 1); - i386_jcc(I386_CC_NS, a); - i386_alu_imm_reg(I386_ADD, (1 << iptr->val.i) - 1, d); + i386_jcc(cd, I386_CC_NS, a); + i386_alu_imm_reg(cd, I386_ADD, (1 << iptr->val.i) - 1, d); - i386_shift_imm_reg(I386_SAR, iptr->val.i, d); + i386_shift_imm_reg(cd, I386_SAR, iptr->val.i, d); store_reg_to_var_int(iptr->dst, d); break; case ICMD_LDIVPOW2: /* ..., value ==> ..., value >> constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { a = 2; CALCIMMEDIATEBYTES(a, (1 << iptr->val.i) - 1); a += 3; - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - - i386_test_reg_reg(REG_ITMP2, REG_ITMP2); - i386_jcc(I386_CC_NS, a); - i386_alu_imm_reg(I386_ADD, (1 << iptr->val.i) - 1, REG_ITMP1); - i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2); - i386_shrd_imm_reg_reg(iptr->val.i, REG_ITMP2, REG_ITMP1); - i386_shift_imm_reg(I386_SAR, iptr->val.i, REG_ITMP2); - - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); + + i386_test_reg_reg(cd, REG_ITMP2, REG_ITMP2); + i386_jcc(cd, I386_CC_NS, a); + i386_alu_imm_reg(cd, I386_ADD, (1 << iptr->val.i) - 1, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADC, 0, REG_ITMP2); + i386_shrd_imm_reg_reg(cd, iptr->val.i, REG_ITMP2, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SAR, iptr->val.i, REG_ITMP2); + + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); } } break; @@ -1787,7 +1615,7 @@ void codegen() /* val.i = constant */ var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_ITMP2); + d = reg_of_var(rd, iptr->dst, REG_ITMP2); if (s1 == d) { M_INTMOVE(s1, REG_ITMP1); s1 = REG_ITMP1; @@ -1801,27 +1629,27 @@ void codegen() /* TODO: optimize */ M_INTMOVE(s1, d); - i386_alu_imm_reg(I386_AND, iptr->val.i, d); - i386_test_reg_reg(s1, s1); - i386_jcc(I386_CC_GE, a); - i386_mov_reg_reg(s1, d); - i386_neg_reg(d); - i386_alu_imm_reg(I386_AND, iptr->val.i, d); - i386_neg_reg(d); - -/* M_INTMOVE(s1, I386_EAX); */ -/* i386_cltd(); */ -/* i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EAX); */ -/* i386_alu_reg_reg(I386_SUB, I386_EDX, I386_EAX); */ -/* i386_alu_reg_reg(I386_AND, iptr->val.i, I386_EAX); */ -/* i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EAX); */ -/* i386_alu_reg_reg(I386_SUB, I386_EDX, I386_EAX); */ -/* M_INTMOVE(I386_EAX, d); */ - -/* i386_alu_reg_reg(I386_XOR, d, d); */ -/* i386_mov_imm_reg(iptr->val.i, I386_ECX); */ -/* i386_shrd_reg_reg(s1, d); */ -/* i386_shift_imm_reg(I386_SHR, 32 - iptr->val.i, d); */ + i386_alu_imm_reg(cd, I386_AND, iptr->val.i, d); + i386_test_reg_reg(cd, s1, s1); + i386_jcc(cd, I386_CC_GE, a); + i386_mov_reg_reg(cd, s1, d); + i386_neg_reg(cd, d); + i386_alu_imm_reg(cd, I386_AND, iptr->val.i, d); + i386_neg_reg(cd, d); + +/* M_INTMOVE(s1, EAX); */ +/* i386_cltd(cd); */ +/* i386_alu_reg_reg(cd, I386_XOR, EDX, EAX); */ +/* i386_alu_reg_reg(cd, I386_SUB, EDX, EAX); */ +/* i386_alu_reg_reg(cd, I386_AND, iptr->val.i, EAX); */ +/* i386_alu_reg_reg(cd, I386_XOR, EDX, EAX); */ +/* i386_alu_reg_reg(cd, I386_SUB, EDX, EAX); */ +/* M_INTMOVE(EAX, d); */ + +/* i386_alu_reg_reg(cd, I386_XOR, d, d); */ +/* i386_mov_imm_reg(cd, iptr->val.i, ECX); */ +/* i386_shrd_reg_reg(cd, s1, d); */ +/* i386_shift_imm_reg(cd, I386_SHR, 32 - iptr->val.i, d); */ store_reg_to_var_int(iptr->dst, d); break; @@ -1829,37 +1657,37 @@ void codegen() case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY) { if (src->flags & INMEMORY) { /* Intel algorithm -- does not work, because constant is wrong */ -/* i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); */ -/* i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); */ +/* i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); */ +/* i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP3); */ /* M_INTMOVE(REG_ITMP1, REG_ITMP2); */ -/* i386_test_reg_reg(REG_ITMP3, REG_ITMP3); */ -/* i386_jcc(I386_CC_NS, offset); */ -/* i386_alu_imm_reg(I386_ADD, (1 << iptr->val.l) - 1, REG_ITMP2); */ -/* i386_alu_imm_reg(I386_ADC, 0, REG_ITMP3); */ +/* i386_test_reg_reg(cd, REG_ITMP3, REG_ITMP3); */ +/* i386_jcc(cd, I386_CC_NS, offset); */ +/* i386_alu_imm_reg(cd, I386_ADD, (1 << iptr->val.l) - 1, REG_ITMP2); */ +/* i386_alu_imm_reg(cd, I386_ADC, 0, REG_ITMP3); */ -/* i386_shrd_imm_reg_reg(iptr->val.l, REG_ITMP3, REG_ITMP2); */ -/* i386_shift_imm_reg(I386_SAR, iptr->val.l, REG_ITMP3); */ -/* i386_shld_imm_reg_reg(iptr->val.l, REG_ITMP2, REG_ITMP3); */ +/* i386_shrd_imm_reg_reg(cd, iptr->val.l, REG_ITMP3, REG_ITMP2); */ +/* i386_shift_imm_reg(cd, I386_SAR, iptr->val.l, REG_ITMP3); */ +/* i386_shld_imm_reg_reg(cd, iptr->val.l, REG_ITMP2, REG_ITMP3); */ -/* i386_shift_imm_reg(I386_SHL, iptr->val.l, REG_ITMP2); */ +/* i386_shift_imm_reg(cd, I386_SHL, iptr->val.l, REG_ITMP2); */ -/* i386_alu_reg_reg(I386_SUB, REG_ITMP2, REG_ITMP1); */ -/* i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); */ -/* i386_alu_reg_reg(I386_SBB, REG_ITMP3, REG_ITMP2); */ +/* i386_alu_reg_reg(cd, I386_SUB, REG_ITMP2, REG_ITMP1); */ +/* i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); */ +/* i386_alu_reg_reg(cd, I386_SBB, REG_ITMP3, REG_ITMP2); */ -/* i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */ -/* i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */ +/* i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */ +/* i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */ /* Alpha algorithm */ a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 3; - CALCOFFSETBYTES(a, src->regoff * 8 + 4); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8 + 4); a += 2; a += 3; @@ -1875,114 +1703,114 @@ void codegen() a += 3; a += 2; - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_imm_reg(I386_AND, iptr->val.l, REG_ITMP1); - i386_alu_imm_reg(I386_AND, iptr->val.l >> 32, REG_ITMP2); - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8 + 4); - i386_jcc(I386_CC_GE, a); + i386_alu_imm_reg(cd, I386_AND, iptr->val.l, REG_ITMP1); + i386_alu_imm_reg(cd, I386_AND, iptr->val.l >> 32, REG_ITMP2); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8 + 4); + i386_jcc(cd, I386_CC_GE, a); - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_neg_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2); - i386_neg_reg(REG_ITMP2); + i386_neg_reg(cd, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADC, 0, REG_ITMP2); + i386_neg_reg(cd, REG_ITMP2); - i386_alu_imm_reg(I386_AND, iptr->val.l, REG_ITMP1); - i386_alu_imm_reg(I386_AND, iptr->val.l >> 32, REG_ITMP2); + i386_alu_imm_reg(cd, I386_AND, iptr->val.l, REG_ITMP1); + i386_alu_imm_reg(cd, I386_AND, iptr->val.l >> 32, REG_ITMP2); - i386_neg_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2); - i386_neg_reg(REG_ITMP2); + i386_neg_reg(cd, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADC, 0, REG_ITMP2); + i386_neg_reg(cd, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); } } break; case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ishift(I386_SHL, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ishift(cd, I386_SHL, src, iptr); break; case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ishiftconst(I386_SHL, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ishiftconst(cd, I386_SHL, src, iptr); break; case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ishift(I386_SAR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ishift(cd, I386_SAR, src, iptr); break; case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ishiftconst(I386_SAR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ishiftconst(cd, I386_SAR, src, iptr); break; case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ishift(I386_SHR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ishift(cd, I386_SHR, src, iptr); break; case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ishiftconst(I386_SHR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ishiftconst(cd, I386_SHR, src, iptr); break; case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY ){ if (src->prev->flags & INMEMORY) { /* if (src->prev->regoff == iptr->dst->regoff) { */ -/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); */ +/* i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); */ /* if (src->flags & INMEMORY) { */ -/* i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); */ +/* i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX); */ /* } else { */ -/* M_INTMOVE(src->regoff, I386_ECX); */ +/* M_INTMOVE(src->regoff, ECX); */ /* } */ -/* i386_test_imm_reg(32, I386_ECX); */ -/* i386_jcc(I386_CC_E, 2 + 2); */ -/* i386_mov_reg_reg(REG_ITMP1, REG_ITMP2); */ -/* i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1); */ +/* i386_test_imm_reg(cd, 32, ECX); */ +/* i386_jcc(cd, I386_CC_E, 2 + 2); */ +/* i386_mov_reg_reg(cd, REG_ITMP1, REG_ITMP2); */ +/* i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); */ -/* i386_shld_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4); */ -/* i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8); */ +/* i386_shld_reg_membase(cd, REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4); */ +/* i386_shift_membase(cd, I386_SHL, REG_SP, iptr->dst->regoff * 8); */ /* } else { */ - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX); } else { - M_INTMOVE(src->regoff, I386_ECX); + M_INTMOVE(src->regoff, ECX); } - i386_test_imm_reg(32, I386_ECX); - i386_jcc(I386_CC_E, 2 + 2); - i386_mov_reg_reg(REG_ITMP1, REG_ITMP2); - i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1); + i386_test_imm_reg(cd, 32, ECX); + i386_jcc(cd, I386_CC_E, 2 + 2); + i386_mov_reg_reg(cd, REG_ITMP1, REG_ITMP3); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); - i386_shld_reg_reg(REG_ITMP1, REG_ITMP2); - i386_shift_reg(I386_SHL, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_shld_reg_reg(cd, REG_ITMP1, REG_ITMP3); + i386_shift_reg(cd, I386_SHL, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4); /* } */ } } @@ -1991,71 +1819,71 @@ void codegen() case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY ) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); if (iptr->val.i & 0x20) { - i386_mov_reg_reg(REG_ITMP1, REG_ITMP2); - i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1); - i386_shld_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP1, REG_ITMP2); + i386_mov_reg_reg(cd, REG_ITMP1, REG_ITMP2); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); + i386_shld_imm_reg_reg(cd, iptr->val.i & 0x3f, REG_ITMP1, REG_ITMP2); } else { - i386_shld_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP1, REG_ITMP2); - i386_shift_imm_reg(I386_SHL, iptr->val.i & 0x3f, REG_ITMP1); + i386_shld_imm_reg_reg(cd, iptr->val.i & 0x3f, REG_ITMP1, REG_ITMP2); + i386_shift_imm_reg(cd, I386_SHL, iptr->val.i & 0x3f, REG_ITMP1); } - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); } break; case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY ){ if (src->prev->flags & INMEMORY) { /* if (src->prev->regoff == iptr->dst->regoff) { */ /* TODO: optimize */ -/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); */ -/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); */ +/* i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); */ +/* i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); */ /* if (src->flags & INMEMORY) { */ -/* i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); */ +/* i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX); */ /* } else { */ -/* M_INTMOVE(src->regoff, I386_ECX); */ +/* M_INTMOVE(src->regoff, ECX); */ /* } */ -/* i386_test_imm_reg(32, I386_ECX); */ -/* i386_jcc(I386_CC_E, 2 + 3); */ -/* i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); */ -/* i386_shift_imm_reg(I386_SAR, 31, REG_ITMP2); */ +/* i386_test_imm_reg(cd, 32, ECX); */ +/* i386_jcc(cd, I386_CC_E, 2 + 3); */ +/* i386_mov_reg_reg(cd, REG_ITMP2, REG_ITMP1); */ +/* i386_shift_imm_reg(cd, I386_SAR, 31, REG_ITMP2); */ -/* i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1); */ -/* i386_shift_reg(I386_SAR, REG_ITMP2); */ -/* i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */ -/* i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */ +/* i386_shrd_reg_reg(cd, REG_ITMP2, REG_ITMP1); */ +/* i386_shift_reg(cd, I386_SAR, REG_ITMP2); */ +/* i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */ +/* i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */ /* } else { */ - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX); } else { - M_INTMOVE(src->regoff, I386_ECX); + M_INTMOVE(src->regoff, ECX); } - i386_test_imm_reg(32, I386_ECX); - i386_jcc(I386_CC_E, 2 + 3); - i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); - i386_shift_imm_reg(I386_SAR, 31, REG_ITMP2); + i386_test_imm_reg(cd, 32, ECX); + i386_jcc(cd, I386_CC_E, 2 + 3); + i386_mov_reg_reg(cd, REG_ITMP3, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SAR, 31, REG_ITMP3); - i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1); - i386_shift_reg(I386_SAR, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_shrd_reg_reg(cd, REG_ITMP3, REG_ITMP1); + i386_shift_reg(cd, I386_SAR, REG_ITMP3); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4); /* } */ } } @@ -2064,71 +1892,71 @@ void codegen() case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY ) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); if (iptr->val.i & 0x20) { - i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); - i386_shift_imm_reg(I386_SAR, 31, REG_ITMP2); - i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); + i386_mov_reg_reg(cd, REG_ITMP2, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SAR, 31, REG_ITMP2); + i386_shrd_imm_reg_reg(cd, iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); } else { - i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); - i386_shift_imm_reg(I386_SAR, iptr->val.i & 0x3f, REG_ITMP2); + i386_shrd_imm_reg_reg(cd, iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SAR, iptr->val.i & 0x3f, REG_ITMP2); } - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); } break; case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY ){ if (src->prev->flags & INMEMORY) { /* if (src->prev->regoff == iptr->dst->regoff) { */ /* TODO: optimize */ -/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); */ -/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); */ +/* i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); */ +/* i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); */ /* if (src->flags & INMEMORY) { */ -/* i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); */ +/* i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX); */ /* } else { */ -/* M_INTMOVE(src->regoff, I386_ECX); */ +/* M_INTMOVE(src->regoff, ECX); */ /* } */ -/* i386_test_imm_reg(32, I386_ECX); */ -/* i386_jcc(I386_CC_E, 2 + 2); */ -/* i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); */ -/* i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); */ +/* i386_test_imm_reg(cd, 32, ECX); */ +/* i386_jcc(cd, I386_CC_E, 2 + 2); */ +/* i386_mov_reg_reg(cd, REG_ITMP2, REG_ITMP1); */ +/* i386_alu_reg_reg(cd, I386_XOR, REG_ITMP2, REG_ITMP2); */ -/* i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1); */ -/* i386_shift_reg(I386_SHR, REG_ITMP2); */ -/* i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */ -/* i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */ +/* i386_shrd_reg_reg(cd, REG_ITMP2, REG_ITMP1); */ +/* i386_shift_reg(cd, I386_SHR, REG_ITMP2); */ +/* i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */ +/* i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */ /* } else { */ - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX); } else { - M_INTMOVE(src->regoff, I386_ECX); + M_INTMOVE(src->regoff, ECX); } - i386_test_imm_reg(32, I386_ECX); - i386_jcc(I386_CC_E, 2 + 2); - i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); - i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); + i386_test_imm_reg(cd, 32, ECX); + i386_jcc(cd, I386_CC_E, 2 + 2); + i386_mov_reg_reg(cd, REG_ITMP3, REG_ITMP1); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP3, REG_ITMP3); - i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1); - i386_shift_reg(I386_SHR, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_shrd_reg_reg(cd, REG_ITMP3, REG_ITMP1); + i386_shift_reg(cd, I386_SHR, REG_ITMP3); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4); /* } */ } } @@ -2137,129 +1965,116 @@ void codegen() case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (iptr->dst->flags & INMEMORY ) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); if (iptr->val.i & 0x20) { - i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); - i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); - i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); + i386_mov_reg_reg(cd, REG_ITMP2, REG_ITMP1); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP2, REG_ITMP2); + i386_shrd_imm_reg_reg(cd, iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); } else { - i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); - i386_shift_imm_reg(I386_SHR, iptr->val.i & 0x3f, REG_ITMP2); + i386_shrd_imm_reg_reg(cd, iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1); + i386_shift_imm_reg(cd, I386_SHR, iptr->val.i & 0x3f, REG_ITMP2); } - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); } break; case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialu(I386_AND, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialu(cd, I386_AND, src, iptr); break; case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialuconst(I386_AND, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialuconst(cd, I386_AND, src, iptr); break; case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_lalu(I386_AND, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_lalu(cd, I386_AND, src, iptr); break; case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_laluconst(I386_AND, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_laluconst(cd, I386_AND, src, iptr); break; case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialu(I386_OR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialu(cd, I386_OR, src, iptr); break; case ICMD_IORCONST: /* ..., value ==> ..., value | constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialuconst(I386_OR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialuconst(cd, I386_OR, src, iptr); break; case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_lalu(I386_OR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_lalu(cd, I386_OR, src, iptr); break; case ICMD_LORCONST: /* ..., value ==> ..., value | constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_laluconst(I386_OR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_laluconst(cd, I386_OR, src, iptr); break; case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialu(I386_XOR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialu(cd, I386_XOR, src, iptr); break; case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ialuconst(I386_XOR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ialuconst(cd, I386_XOR, src, iptr); break; case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_lalu(I386_XOR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_lalu(cd, I386_XOR, src, iptr); break; case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */ /* val.l = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_laluconst(I386_XOR, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_laluconst(cd, I386_XOR, src, iptr); break; case ICMD_IINC: /* ..., value ==> ..., value + constant */ /* op1 = variable, val.i = constant */ - var = &(locals[iptr->op1][TYPE_INT]); + var = &(rd->locals[iptr->op1][TYPE_INT]); if (var->flags & INMEMORY) { - if (iptr->val.i == 1) { - i386_inc_membase(REG_SP, var->regoff * 8); - - } else if (iptr->val.i == -1) { - i386_dec_membase(REG_SP, var->regoff * 8); - - } else { - i386_alu_imm_membase(I386_ADD, iptr->val.i, REG_SP, var->regoff * 8); - } + i386_alu_imm_membase(cd, I386_ADD, iptr->val.i, REG_SP, var->regoff * 8); } else { - if (iptr->val.i == 1) { - i386_inc_reg(var->regoff); - - } else if (iptr->val.i == -1) { - i386_dec_reg(var->regoff); - - } else { - i386_alu_imm_reg(I386_ADD, iptr->val.i, var->regoff); - } + /* `inc reg' is slower on p4's (regarding to ia32 */ + /* optimization reference manual and benchmarks) and as fast */ + /* on athlon's. */ + i386_alu_imm_reg(cd, I386_ADD, iptr->val.i, var->regoff); } break; @@ -2267,22 +2082,22 @@ void codegen() /* floating operations ************************************************/ #if 0 #define ROUND_TO_SINGLE \ - i386_fstps_membase(REG_SP, -8); \ - i386_flds_membase(REG_SP, -8); + i386_fstps_membase(cd, REG_SP, -8); \ + i386_flds_membase(cd, REG_SP, -8); #define ROUND_TO_DOUBLE \ - i386_fstpl_membase(REG_SP, -8); \ - i386_fldl_membase(REG_SP, -8); + i386_fstpl_membase(cd, REG_SP, -8); \ + i386_fldl_membase(cd, REG_SP, -8); #define FPU_SET_24BIT_MODE \ if (!fpu_in_24bit_mode) { \ - i386_fldcw_mem(&fpu_ctrlwrd_24bit); \ + i386_fldcw_mem(cd, &fpu_ctrlwrd_24bit); \ fpu_in_24bit_mode = 1; \ } #define FPU_SET_53BIT_MODE \ if (fpu_in_24bit_mode) { \ - i386_fldcw_mem(&fpu_ctrlwrd_53bit); \ + i386_fldcw_mem(cd, &fpu_ctrlwrd_53bit); \ fpu_in_24bit_mode = 0; \ } #else @@ -2295,8 +2110,8 @@ void codegen() FPU_SET_24BIT_MODE; var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_FTMP3); - i386_fchs(); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); + i386_fchs(cd); store_reg_to_var_flt(iptr->dst, d); break; @@ -2304,18 +2119,18 @@ void codegen() FPU_SET_53BIT_MODE; var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_FTMP3); - i386_fchs(); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); + i386_fchs(cd); store_reg_to_var_flt(iptr->dst, d); break; case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */ FPU_SET_24BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); var_to_reg_flt(s2, src, REG_FTMP2); - i386_faddp(); + i386_faddp(cd); fpu_st_offset--; store_reg_to_var_flt(iptr->dst, d); break; @@ -2323,10 +2138,10 @@ void codegen() case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */ FPU_SET_53BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); var_to_reg_flt(s2, src, REG_FTMP2); - i386_faddp(); + i386_faddp(cd); fpu_st_offset--; store_reg_to_var_flt(iptr->dst, d); break; @@ -2334,10 +2149,10 @@ void codegen() case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */ FPU_SET_24BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); var_to_reg_flt(s2, src, REG_FTMP2); - i386_fsubp(); + i386_fsubp(cd); fpu_st_offset--; store_reg_to_var_flt(iptr->dst, d); break; @@ -2345,10 +2160,10 @@ void codegen() case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */ FPU_SET_53BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); var_to_reg_flt(s2, src, REG_FTMP2); - i386_fsubp(); + i386_fsubp(cd); fpu_st_offset--; store_reg_to_var_flt(iptr->dst, d); break; @@ -2356,10 +2171,10 @@ void codegen() case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */ FPU_SET_24BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); var_to_reg_flt(s2, src, REG_FTMP2); - i386_fmulp(); + i386_fmulp(cd); fpu_st_offset--; ROUND_TO_SINGLE; store_reg_to_var_flt(iptr->dst, d); @@ -2368,19 +2183,19 @@ void codegen() case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */ FPU_SET_53BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); -/* i386_fldt_mem(subnormal_bias1); */ -/* i386_fmulp(); */ +/* i386_fldt_mem(cd, subnormal_bias1); */ +/* i386_fmulp(cd); */ var_to_reg_flt(s2, src, REG_FTMP2); - i386_fmulp(); + i386_fmulp(cd); fpu_st_offset--; -/* i386_fldt_mem(subnormal_bias2); */ -/* i386_fmulp(); */ +/* i386_fldt_mem(cd, subnormal_bias2); */ +/* i386_fmulp(cd); */ store_reg_to_var_flt(iptr->dst, d); break; @@ -2388,10 +2203,10 @@ void codegen() case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */ FPU_SET_24BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); var_to_reg_flt(s2, src, REG_FTMP2); - i386_fdivp(); + i386_fdivp(cd); fpu_st_offset--; ROUND_TO_SINGLE; store_reg_to_var_flt(iptr->dst, d); @@ -2400,19 +2215,19 @@ void codegen() case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */ FPU_SET_53BIT_MODE; - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); var_to_reg_flt(s1, src->prev, REG_FTMP1); -/* i386_fldt_mem(subnormal_bias1); */ -/* i386_fmulp(); */ +/* i386_fldt_mem(cd, subnormal_bias1); */ +/* i386_fmulp(cd); */ var_to_reg_flt(s2, src, REG_FTMP2); - i386_fdivp(); + i386_fdivp(cd); fpu_st_offset--; -/* i386_fldt_mem(subnormal_bias2); */ -/* i386_fmulp(); */ +/* i386_fldt_mem(cd, subnormal_bias2); */ +/* i386_fmulp(cd); */ store_reg_to_var_flt(iptr->dst, d); break; @@ -2423,16 +2238,16 @@ void codegen() /* exchanged to skip fxch */ var_to_reg_flt(s2, src, REG_FTMP2); var_to_reg_flt(s1, src->prev, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_FTMP3); -/* i386_fxch(); */ - i386_fprem(); - i386_wait(); - i386_fnstsw(); - i386_sahf(); - i386_jcc(I386_CC_P, -(2 + 1 + 2 + 1 + 6)); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); +/* i386_fxch(cd); */ + i386_fprem(cd); + i386_wait(cd); + i386_fnstsw(cd); + i386_sahf(cd); + i386_jcc(cd, I386_CC_P, -(2 + 1 + 2 + 1 + 6)); store_reg_to_var_flt(iptr->dst, d); - i386_ffree_reg(0); - i386_fincstp(); + i386_ffree_reg(cd, 0); + i386_fincstp(cd); fpu_st_offset--; break; @@ -2442,33 +2257,33 @@ void codegen() /* exchanged to skip fxch */ var_to_reg_flt(s2, src, REG_FTMP2); var_to_reg_flt(s1, src->prev, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_FTMP3); -/* i386_fxch(); */ - i386_fprem(); - i386_wait(); - i386_fnstsw(); - i386_sahf(); - i386_jcc(I386_CC_P, -(2 + 1 + 2 + 1 + 6)); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); +/* i386_fxch(cd); */ + i386_fprem(cd); + i386_wait(cd); + i386_fnstsw(cd); + i386_sahf(cd); + i386_jcc(cd, I386_CC_P, -(2 + 1 + 2 + 1 + 6)); store_reg_to_var_flt(iptr->dst, d); - i386_ffree_reg(0); - i386_fincstp(); + i386_ffree_reg(cd, 0); + i386_fincstp(cd); fpu_st_offset--; break; case ICMD_I2F: /* ..., value ==> ..., (float) value */ case ICMD_I2D: /* ..., value ==> ..., (double) value */ - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if (src->flags & INMEMORY) { - i386_fildl_membase(REG_SP, src->regoff * 8); + i386_fildl_membase(cd, REG_SP, src->regoff * 8); fpu_st_offset++; } else { - a = dseg_adds4(0); - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_mov_reg_membase(src->regoff, REG_ITMP1, a); - i386_fildl_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0); + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_mov_reg_membase(cd, src->regoff, REG_ITMP1, a); + i386_fildl_membase(cd, REG_ITMP1, a); fpu_st_offset++; } store_reg_to_var_flt(iptr->dst, d); @@ -2477,9 +2292,9 @@ void codegen() case ICMD_L2F: /* ..., value ==> ..., (float) value */ case ICMD_L2D: /* ..., value ==> ..., (double) value */ - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if (src->flags & INMEMORY) { - i386_fildll_membase(REG_SP, src->regoff * 8); + i386_fildll_membase(cd, REG_SP, src->regoff * 8); fpu_st_offset++; } else { @@ -2491,158 +2306,158 @@ void codegen() case ICMD_F2I: /* ..., value ==> ..., (int) value */ var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_NULL); - a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */ - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x0e7f); /* Round to zero, 53-bit mode, exception masked */ + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_fldcw_membase(cd, REG_ITMP1, a); if (iptr->dst->flags & INMEMORY) { - i386_fistpl_membase(REG_SP, iptr->dst->regoff * 8); + i386_fistpl_membase(cd, REG_SP, iptr->dst->regoff * 8); fpu_st_offset--; - a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ + i386_fldcw_membase(cd, REG_ITMP1, a); - i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8); a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 5 + 2 + 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); } else { - a = dseg_adds4(0); - i386_fistpl_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0); + i386_fistpl_membase(cd, REG_ITMP1, a); fpu_st_offset--; - i386_mov_membase_reg(REG_ITMP1, a, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_ITMP1, a, iptr->dst->regoff); - a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ + i386_fldcw_membase(cd, REG_ITMP1, a); - i386_alu_imm_reg(I386_CMP, 0x80000000, iptr->dst->regoff); + i386_alu_imm_reg(cd, I386_CMP, 0x80000000, iptr->dst->regoff); a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); - a += 5 + 2 + ((REG_RESULT == d) ? 0 : 2); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); + a += 5 + 2 + ((REG_RESULT == iptr->dst->regoff) ? 0 : 2); } - i386_jcc(I386_CC_NE, a); + i386_jcc(cd, I386_CC_NE, a); - /* XXX: change this when we use registers */ - i386_flds_membase(REG_SP, src->regoff * 8); - i386_mov_imm_reg((s4) asm_builtin_f2i, REG_ITMP2); - i386_call_reg(REG_ITMP2); + /* XXX: change this when we use registers */ + i386_flds_membase(cd, REG_SP, src->regoff * 8); + i386_mov_imm_reg(cd, (s4) asm_builtin_f2i, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); if (iptr->dst->flags & INMEMORY) { - i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, iptr->dst->regoff * 8); } else { - M_INTMOVE(REG_RESULT, d); + M_INTMOVE(REG_RESULT, iptr->dst->regoff); } break; case ICMD_D2I: /* ..., value ==> ..., (int) value */ var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_NULL); - a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */ - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x0e7f); /* Round to zero, 53-bit mode, exception masked */ + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_fldcw_membase(cd, REG_ITMP1, a); if (iptr->dst->flags & INMEMORY) { - i386_fistpl_membase(REG_SP, iptr->dst->regoff * 8); + i386_fistpl_membase(cd, REG_SP, iptr->dst->regoff * 8); fpu_st_offset--; - a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ + i386_fldcw_membase(cd, REG_ITMP1, a); - i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8); a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 5 + 2 + 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); } else { - a = dseg_adds4(0); - i386_fistpl_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0); + i386_fistpl_membase(cd, REG_ITMP1, a); fpu_st_offset--; - i386_mov_membase_reg(REG_ITMP1, a, iptr->dst->regoff); + i386_mov_membase_reg(cd, REG_ITMP1, a, iptr->dst->regoff); - a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ + i386_fldcw_membase(cd, REG_ITMP1, a); - i386_alu_imm_reg(I386_CMP, 0x80000000, iptr->dst->regoff); + i386_alu_imm_reg(cd, I386_CMP, 0x80000000, iptr->dst->regoff); a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); - a += 5 + 2 + ((REG_RESULT == d) ? 0 : 2); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); + a += 5 + 2 + ((REG_RESULT == iptr->dst->regoff) ? 0 : 2); } - i386_jcc(I386_CC_NE, a); + i386_jcc(cd, I386_CC_NE, a); /* XXX: change this when we use registers */ - i386_fldl_membase(REG_SP, src->regoff * 8); - i386_mov_imm_reg((s4) asm_builtin_d2i, REG_ITMP2); - i386_call_reg(REG_ITMP2); + i386_fldl_membase(cd, REG_SP, src->regoff * 8); + i386_mov_imm_reg(cd, (s4) asm_builtin_d2i, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); if (iptr->dst->flags & INMEMORY) { - i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, iptr->dst->regoff * 8); } else { - M_INTMOVE(REG_RESULT, d); + M_INTMOVE(REG_RESULT, iptr->dst->regoff); } break; case ICMD_F2L: /* ..., value ==> ..., (long) value */ var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_NULL); - a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */ - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x0e7f); /* Round to zero, 53-bit mode, exception masked */ + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_fldcw_membase(cd, REG_ITMP1, a); if (iptr->dst->flags & INMEMORY) { - i386_fistpll_membase(REG_SP, iptr->dst->regoff * 8); + i386_fistpll_membase(cd, REG_SP, iptr->dst->regoff * 8); fpu_st_offset--; - a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ + i386_fldcw_membase(cd, REG_ITMP1, a); - i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8 + 4); + i386_alu_imm_membase(cd, I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8 + 4); a = 6 + 4; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); a += 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 5 + 2; a += 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); a += 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8 + 4); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8 + 4); - i386_jcc(I386_CC_NE, a); + i386_jcc(cd, I386_CC_NE, a); - i386_alu_imm_membase(I386_CMP, 0, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, iptr->dst->regoff * 8); a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 5 + 2 + 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); - i386_jcc(I386_CC_NE, a); + i386_jcc(cd, I386_CC_NE, a); /* XXX: change this when we use registers */ - i386_flds_membase(REG_SP, src->regoff * 8); - i386_mov_imm_reg((s4) asm_builtin_f2l, REG_ITMP2); - i386_call_reg(REG_ITMP2); - i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_flds_membase(cd, REG_SP, src->regoff * 8); + i386_mov_imm_reg(cd, (s4) asm_builtin_f2l, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4); } else { panic("F2L: longs have to be in memory"); @@ -2652,49 +2467,49 @@ void codegen() case ICMD_D2L: /* ..., value ==> ..., (long) value */ var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_NULL); - a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */ - i386_mov_imm_reg(0, REG_ITMP1); - dseg_adddata(mcodeptr); - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x0e7f); /* Round to zero, 53-bit mode, exception masked */ + i386_mov_imm_reg(cd, 0, REG_ITMP1); + dseg_adddata(cd, cd->mcodeptr); + i386_fldcw_membase(cd, REG_ITMP1, a); if (iptr->dst->flags & INMEMORY) { - i386_fistpll_membase(REG_SP, iptr->dst->regoff * 8); + i386_fistpll_membase(cd, REG_SP, iptr->dst->regoff * 8); fpu_st_offset--; - a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ - i386_fldcw_membase(REG_ITMP1, a); + a = dseg_adds4(cd, 0x027f); /* Round to nearest, 53-bit mode, exceptions masked */ + i386_fldcw_membase(cd, REG_ITMP1, a); - i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8 + 4); + i386_alu_imm_membase(cd, I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8 + 4); a = 6 + 4; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); a += 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 5 + 2; a += 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); a += 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8 + 4); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8 + 4); - i386_jcc(I386_CC_NE, a); + i386_jcc(cd, I386_CC_NE, a); - i386_alu_imm_membase(I386_CMP, 0, REG_SP, iptr->dst->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, iptr->dst->regoff * 8); a = 3; - CALCOFFSETBYTES(a, src->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); a += 5 + 2 + 3; - CALCOFFSETBYTES(a, iptr->dst->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, iptr->dst->regoff * 8); - i386_jcc(I386_CC_NE, a); + i386_jcc(cd, I386_CC_NE, a); /* XXX: change this when we use registers */ - i386_fldl_membase(REG_SP, src->regoff * 8); - i386_mov_imm_reg((s4) asm_builtin_d2l, REG_ITMP2); - i386_call_reg(REG_ITMP2); - i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_fldl_membase(cd, REG_SP, src->regoff * 8); + i386_mov_imm_reg(cd, (s4) asm_builtin_d2l, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4); } else { panic("D2L: longs have to be in memory"); @@ -2704,7 +2519,7 @@ void codegen() case ICMD_F2D: /* ..., value ==> ..., (double) value */ var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); /* nothing to do */ store_reg_to_var_flt(iptr->dst, d); break; @@ -2712,7 +2527,7 @@ void codegen() case ICMD_D2F: /* ..., value ==> ..., (float) value */ var_to_reg_flt(s1, src, REG_FTMP1); - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); /* nothing to do */ store_reg_to_var_flt(iptr->dst, d); break; @@ -2723,21 +2538,21 @@ void codegen() /* exchanged to skip fxch */ var_to_reg_flt(s2, src->prev, REG_FTMP1); var_to_reg_flt(s1, src, REG_FTMP2); - d = reg_of_var(iptr->dst, REG_ITMP2); - i386_alu_reg_reg(I386_XOR, d, d); -/* i386_fxch(); */ - i386_fucompp(); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); +/* i386_fxch(cd); */ + i386_fucompp(cd); fpu_st_offset -= 2; - i386_fnstsw(); - i386_test_imm_reg(0x400, I386_EAX); /* unordered treat as GT */ - i386_jcc(I386_CC_E, 6); - i386_alu_imm_reg(I386_AND, 0x000000ff, I386_EAX); - i386_sahf(); - i386_jcc(I386_CC_E, 6 + 1 + 5 + 1); - i386_jcc(I386_CC_B, 1 + 5); - i386_dec_reg(d); - i386_jmp_imm(1); - i386_inc_reg(d); + i386_fnstsw(cd); + i386_test_imm_reg(cd, 0x400, EAX); /* unordered treat as GT */ + i386_jcc(cd, I386_CC_E, 6); + i386_alu_imm_reg(cd, I386_AND, 0x000000ff, EAX); + i386_sahf(cd); + i386_mov_imm_reg(cd, 0, d); /* does not affect flags */ + i386_jcc(cd, I386_CC_E, 6 + 3 + 5 + 3); + i386_jcc(cd, I386_CC_B, 3 + 5); + i386_alu_imm_reg(cd, I386_SUB, 1, d); + i386_jmp_imm(cd, 3); + i386_alu_imm_reg(cd, I386_ADD, 1, d); store_reg_to_var_int(iptr->dst, d); break; @@ -2747,40 +2562,33 @@ void codegen() /* exchanged to skip fxch */ var_to_reg_flt(s2, src->prev, REG_FTMP1); var_to_reg_flt(s1, src, REG_FTMP2); - d = reg_of_var(iptr->dst, REG_ITMP2); - i386_alu_reg_reg(I386_XOR, d, d); -/* i386_fxch(); */ - i386_fucompp(); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); +/* i386_fxch(cd); */ + i386_fucompp(cd); fpu_st_offset -= 2; - i386_fnstsw(); - i386_test_imm_reg(0x400, I386_EAX); /* unordered treat as LT */ - i386_jcc(I386_CC_E, 3); - i386_movb_imm_reg(1, I386_AH); - i386_sahf(); - i386_jcc(I386_CC_E, 6 + 1 + 5 + 1); - i386_jcc(I386_CC_B, 1 + 5); - i386_dec_reg(d); - i386_jmp_imm(1); - i386_inc_reg(d); + i386_fnstsw(cd); + i386_test_imm_reg(cd, 0x400, EAX); /* unordered treat as LT */ + i386_jcc(cd, I386_CC_E, 3); + i386_movb_imm_reg(cd, 1, I386_AH); + i386_sahf(cd); + i386_mov_imm_reg(cd, 0, d); /* does not affect flags */ + i386_jcc(cd, I386_CC_E, 6 + 3 + 5 + 3); + i386_jcc(cd, I386_CC_B, 3 + 5); + i386_alu_imm_reg(cd, I386_SUB, 1, d); + i386_jmp_imm(cd, 3); + i386_alu_imm_reg(cd, I386_ADD, 1, d); store_reg_to_var_int(iptr->dst, d); break; /* memory operations **************************************************/ -#define gen_bound_check \ - if (checkbounds) { \ - i386_alu_membase_reg(I386_CMP, s1, OFFSET(java_arrayheader, size), s2); \ - i386_jcc(I386_CC_AE, 0); \ - codegen_addxboundrefs(mcodeptr); \ - } - case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., length */ var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_ITMP2); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); gen_nullptr_check(s1); - i386_mov_membase_reg(s1, OFFSET(java_arrayheader, size), d); + i386_mov_membase_reg(cd, s1, OFFSET(java_arrayheader, size), d); store_reg_to_var_int(iptr->dst, d); break; @@ -2788,12 +2596,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_mov_memindex_reg(OFFSET(java_objectarray, data[0]), s1, s2, 2, d); + i386_mov_memindex_reg(cd, OFFSET(java_objectarray, data[0]), s1, s2, 2, d); store_reg_to_var_int(iptr->dst, d); break; @@ -2801,17 +2609,17 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_ITMP3); + d = reg_of_var(rd, iptr->dst, REG_ITMP3); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } if (iptr->dst->flags & INMEMORY) { - i386_mov_memindex_reg(OFFSET(java_longarray, data[0]), s1, s2, 3, REG_ITMP3); - i386_mov_reg_membase(REG_ITMP3, REG_SP, iptr->dst->regoff * 8); - i386_mov_memindex_reg(OFFSET(java_longarray, data[0]) + 4, s1, s2, 3, REG_ITMP3); - i386_mov_reg_membase(REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_memindex_reg(cd, OFFSET(java_longarray, data[0]), s1, s2, 3, REG_ITMP3); + i386_mov_reg_membase(cd, REG_ITMP3, REG_SP, iptr->dst->regoff * 8); + i386_mov_memindex_reg(cd, OFFSET(java_longarray, data[0]) + 4, s1, s2, 3, REG_ITMP3); + i386_mov_reg_membase(cd, REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4); } break; @@ -2819,12 +2627,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_mov_memindex_reg(OFFSET(java_intarray, data[0]), s1, s2, 2, d); + i386_mov_memindex_reg(cd, OFFSET(java_intarray, data[0]), s1, s2, 2, d); store_reg_to_var_int(iptr->dst, d); break; @@ -2832,12 +2640,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_FTMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_flds_memindex(OFFSET(java_floatarray, data[0]), s1, s2, 2); + i386_flds_memindex(cd, OFFSET(java_floatarray, data[0]), s1, s2, 2); fpu_st_offset++; store_reg_to_var_flt(iptr->dst, d); break; @@ -2846,12 +2654,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_FTMP3); + d = reg_of_var(rd, iptr->dst, REG_FTMP3); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_fldl_memindex(OFFSET(java_doublearray, data[0]), s1, s2, 3); + i386_fldl_memindex(cd, OFFSET(java_doublearray, data[0]), s1, s2, 3); fpu_st_offset++; store_reg_to_var_flt(iptr->dst, d); break; @@ -2860,12 +2668,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_movzwl_memindex_reg(OFFSET(java_chararray, data[0]), s1, s2, 1, d); + i386_movzwl_memindex_reg(cd, OFFSET(java_chararray, data[0]), s1, s2, 1, d); store_reg_to_var_int(iptr->dst, d); break; @@ -2873,12 +2681,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_movswl_memindex_reg(OFFSET(java_shortarray, data[0]), s1, s2, 1, d); + i386_movswl_memindex_reg(cd, OFFSET(java_shortarray, data[0]), s1, s2, 1, d); store_reg_to_var_int(iptr->dst, d); break; @@ -2886,12 +2694,12 @@ void codegen() var_to_reg_int(s1, src->prev, REG_ITMP1); var_to_reg_int(s2, src, REG_ITMP2); - d = reg_of_var(iptr->dst, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP1); if (iptr->op1 == 0) { gen_nullptr_check(s1); gen_bound_check; } - i386_movsbl_memindex_reg(OFFSET(java_bytearray, data[0]), s1, s2, 0, d); + i386_movsbl_memindex_reg(cd, OFFSET(java_bytearray, data[0]), s1, s2, 0, d); store_reg_to_var_int(iptr->dst, d); break; @@ -2905,7 +2713,7 @@ void codegen() gen_bound_check; } var_to_reg_int(s3, src, REG_ITMP3); - i386_mov_reg_memindex(s3, OFFSET(java_objectarray, data[0]), s1, s2, 2); + i386_mov_reg_memindex(cd, s3, OFFSET(java_objectarray, data[0]), s1, s2, 2); break; case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2918,10 +2726,10 @@ void codegen() } if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); - i386_mov_reg_memindex(REG_ITMP3, OFFSET(java_longarray, data[0]), s1, s2, 3); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); - i386_mov_reg_memindex(REG_ITMP3, OFFSET(java_longarray, data[0]) + 4, s1, s2, 3); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3); + i386_mov_reg_memindex(cd, REG_ITMP3, OFFSET(java_longarray, data[0]), s1, s2, 3); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP3); + i386_mov_reg_memindex(cd, REG_ITMP3, OFFSET(java_longarray, data[0]) + 4, s1, s2, 3); } break; @@ -2934,7 +2742,7 @@ void codegen() gen_bound_check; } var_to_reg_int(s3, src, REG_ITMP3); - i386_mov_reg_memindex(s3, OFFSET(java_intarray, data[0]), s1, s2, 2); + i386_mov_reg_memindex(cd, s3, OFFSET(java_intarray, data[0]), s1, s2, 2); break; case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2946,7 +2754,7 @@ void codegen() gen_bound_check; } var_to_reg_flt(s3, src, REG_FTMP1); - i386_fstps_memindex(OFFSET(java_floatarray, data[0]), s1, s2, 2); + i386_fstps_memindex(cd, OFFSET(java_floatarray, data[0]), s1, s2, 2); fpu_st_offset--; break; @@ -2959,7 +2767,7 @@ void codegen() gen_bound_check; } var_to_reg_flt(s3, src, REG_FTMP1); - i386_fstpl_memindex(OFFSET(java_doublearray, data[0]), s1, s2, 3); + i386_fstpl_memindex(cd, OFFSET(java_doublearray, data[0]), s1, s2, 3); fpu_st_offset--; break; @@ -2972,7 +2780,7 @@ void codegen() gen_bound_check; } var_to_reg_int(s3, src, REG_ITMP3); - i386_movw_reg_memindex(s3, OFFSET(java_chararray, data[0]), s1, s2, 1); + i386_movw_reg_memindex(cd, s3, OFFSET(java_chararray, data[0]), s1, s2, 1); break; case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2984,7 +2792,7 @@ void codegen() gen_bound_check; } var_to_reg_int(s3, src, REG_ITMP3); - i386_movw_reg_memindex(s3, OFFSET(java_shortarray, data[0]), s1, s2, 1); + i386_movw_reg_memindex(cd, s3, OFFSET(java_shortarray, data[0]), s1, s2, 1); break; case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */ @@ -2996,319 +2804,430 @@ void codegen() gen_bound_check; } var_to_reg_int(s3, src, REG_ITMP3); - M_INTMOVE(s3, REG_ITMP3); /* because EBP, ESI, EDI have no xH and xL bytes */ - i386_movb_reg_memindex(REG_ITMP3, OFFSET(java_bytearray, data[0]), s1, s2, 0); + if (s3 >= EBP) { /* because EBP, ESI, EDI have no xH and xL nibbles */ + M_INTMOVE(s3, REG_ITMP3); + s3 = REG_ITMP3; + } + i386_movb_reg_memindex(cd, s3, OFFSET(java_bytearray, data[0]), s1, s2, 0); break; + case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */ - case ICMD_PUTSTATIC: /* ..., value ==> ... */ - /* op1 = type, val.a = field address */ - - a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value)); - /* here it's slightly slower */ - i386_mov_imm_reg(0, REG_ITMP2); - dseg_adddata(mcodeptr); - i386_mov_membase_reg(REG_ITMP2, a, REG_ITMP2); - switch (iptr->op1) { - case TYPE_INT: - case TYPE_ADR: - var_to_reg_int(s2, src, REG_ITMP1); - i386_mov_reg_membase(s2, REG_ITMP2, 0); - break; - case TYPE_LNG: - if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_ITMP2, 0); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_ITMP2, 0 + 4); - } else { - panic("PUTSTATIC: longs have to be in memory"); - } - break; - case TYPE_FLT: - var_to_reg_flt(s2, src, REG_FTMP1); - i386_fstps_membase(REG_ITMP2, 0); - fpu_st_offset--; - break; - case TYPE_DBL: - var_to_reg_flt(s2, src, REG_FTMP1); - i386_fstpl_membase(REG_ITMP2, 0); - fpu_st_offset--; - break; - default: panic ("internal error"); - } + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + if (iptr->op1 == 0) { + gen_nullptr_check(s1); + gen_bound_check; + } + i386_mov_imm_memindex(cd, iptr->val.i, OFFSET(java_intarray, data[0]), s1, s2, 2); break; - case ICMD_GETSTATIC: /* ... ==> ..., value */ - /* op1 = type, val.a = field address */ - - a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value)); - i386_mov_imm_reg(0, REG_ITMP2); - dseg_adddata(mcodeptr); - i386_mov_membase_reg(REG_ITMP2, a, REG_ITMP2); - switch (iptr->op1) { - case TYPE_INT: - case TYPE_ADR: - d = reg_of_var(iptr->dst, REG_ITMP1); - i386_mov_membase_reg(REG_ITMP2, 0, d); - store_reg_to_var_int(iptr->dst, d); - break; - case TYPE_LNG: - d = reg_of_var(iptr->dst, REG_NULL); - if (iptr->dst->flags & INMEMORY) { - i386_mov_membase_reg(REG_ITMP2, 0, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_membase_reg(REG_ITMP2, 0 + 4, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4); - } else { - panic("GETSTATIC: longs have to be in memory"); - } - break; - case TYPE_FLT: - d = reg_of_var(iptr->dst, REG_FTMP1); - i386_flds_membase(REG_ITMP2, 0); - fpu_st_offset++; - store_reg_to_var_flt(iptr->dst, d); - break; - case TYPE_DBL: - d = reg_of_var(iptr->dst, REG_FTMP1); - i386_fldl_membase(REG_ITMP2, 0); - fpu_st_offset++; - store_reg_to_var_flt(iptr->dst, d); - break; - default: panic ("internal error"); - } - break; + case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */ - case ICMD_PUTFIELD: /* ..., value ==> ... */ - /* op1 = type, val.i = field offset */ + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + if (iptr->op1 == 0) { + gen_nullptr_check(s1); + gen_bound_check; + } - a = ((fieldinfo *)(iptr->val.a))->offset; - switch (iptr->op1) { - case TYPE_INT: - case TYPE_ADR: - var_to_reg_int(s1, src->prev, REG_ITMP1); - var_to_reg_int(s2, src, REG_ITMP2); - gen_nullptr_check(s1); - i386_mov_reg_membase(s2, s1, a); - break; - case TYPE_LNG: - var_to_reg_int(s1, src->prev, REG_ITMP1); - gen_nullptr_check(s1); - if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP2, s1, a); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP2, s1, a + 4); - } else { - panic("PUTFIELD: longs have to be in memory"); - } - break; - case TYPE_FLT: - var_to_reg_int(s1, src->prev, REG_ITMP1); - var_to_reg_flt(s2, src, REG_FTMP1); - gen_nullptr_check(s1); - i386_fstps_membase(s1, a); - fpu_st_offset--; - break; - case TYPE_DBL: - var_to_reg_int(s1, src->prev, REG_ITMP1); - var_to_reg_flt(s2, src, REG_FTMP1); - gen_nullptr_check(s1); - i386_fstpl_membase(s1, a); - fpu_st_offset--; - break; - default: panic ("internal error"); - } + i386_mov_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3); + i386_mov_imm_memindex(cd, (u4) (iptr->val.l >> 32), OFFSET(java_longarray, data[0]) + 4, s1, s2, 3); break; - case ICMD_GETFIELD: /* ... ==> ..., value */ - /* op1 = type, val.i = field offset */ + case ICMD_AASTORECONST: /* ..., arrayref, index ==> ... */ - a = ((fieldinfo *)(iptr->val.a))->offset; - switch (iptr->op1) { - case TYPE_INT: - case TYPE_ADR: - var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_ITMP2); - gen_nullptr_check(s1); - i386_mov_membase_reg(s1, a, d); - store_reg_to_var_int(iptr->dst, d); - break; - case TYPE_LNG: - var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_NULL); - gen_nullptr_check(s1); - i386_mov_membase_reg(s1, a, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8); - i386_mov_membase_reg(s1, a + 4, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); - break; - case TYPE_FLT: - var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_FTMP1); - gen_nullptr_check(s1); - i386_flds_membase(s1, a); - fpu_st_offset++; - store_reg_to_var_flt(iptr->dst, d); - break; - case TYPE_DBL: - var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_FTMP1); - gen_nullptr_check(s1); - i386_fldl_membase(s1, a); - fpu_st_offset++; - store_reg_to_var_flt(iptr->dst, d); - break; - default: panic ("internal error"); - } + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + if (iptr->op1 == 0) { + gen_nullptr_check(s1); + gen_bound_check; + } + i386_mov_imm_memindex(cd, 0, OFFSET(java_objectarray, data[0]), s1, s2, 2); break; + case ICMD_BASTORECONST: /* ..., arrayref, index ==> ... */ - /* branch operations **************************************************/ - - /* TWISTI */ -/* #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}} */ -#define ALIGNCODENOP do {} while (0) - - case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */ - - var_to_reg_int(s1, src, REG_ITMP1); - M_INTMOVE(s1, REG_ITMP1_XPTR); - - i386_call_imm(0); /* passing exception pointer */ - i386_pop_reg(REG_ITMP2_XPC); - - i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI); - i386_jmp_reg(I386_EDI); - ALIGNCODENOP; + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + if (iptr->op1 == 0) { + gen_nullptr_check(s1); + gen_bound_check; + } + i386_movb_imm_memindex(cd, iptr->val.i, OFFSET(java_bytearray, data[0]), s1, s2, 0); break; - case ICMD_GOTO: /* ... ==> ... */ - /* op1 = target JavaVM pc */ + case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */ - i386_jmp_imm(0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); - ALIGNCODENOP; + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + if (iptr->op1 == 0) { + gen_nullptr_check(s1); + gen_bound_check; + } + i386_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_chararray, data[0]), s1, s2, 1); break; - case ICMD_JSR: /* ... ==> ... */ - /* op1 = target JavaVM pc */ + case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */ - i386_call_imm(0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + if (iptr->op1 == 0) { + gen_nullptr_check(s1); + gen_bound_check; + } + i386_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_shortarray, data[0]), s1, s2, 1); break; - - case ICMD_RET: /* ... ==> ... */ - /* op1 = local variable */ - var = &(locals[iptr->op1][TYPE_ADR]); - var_to_reg_int(s1, var, REG_ITMP1); - i386_jmp_reg(s1); - break; - case ICMD_IFNULL: /* ..., value ==> ... */ - /* op1 = target JavaVM pc */ + case ICMD_PUTSTATIC: /* ..., value ==> ... */ + /* op1 = type, val.a = field address */ - if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); + /* If the static fields' class is not yet initialized, we do it */ + /* now. The call code is generated later. */ + if (!((fieldinfo *) iptr->val.a)->class->initialized) { + codegen_addclinitref(cd, cd->mcodeptr, ((fieldinfo *) iptr->val.a)->class); + + /* This is just for debugging purposes. Is very difficult to */ + /* read patched code. Here we patch the following 5 nop's */ + /* so that the real code keeps untouched. */ + if (showdisassemble) { + i386_nop(cd); + i386_nop(cd); + i386_nop(cd); + i386_nop(cd); + i386_nop(cd); + } + } + + a = (u4) &(((fieldinfo *) iptr->val.a)->value); + switch (iptr->op1) { + case TYPE_INT: + case TYPE_ADR: + var_to_reg_int(s2, src, REG_ITMP1); + i386_mov_reg_mem(cd, s2, a); + break; + case TYPE_LNG: + if (src->flags & INMEMORY) { + /* Using both REG_ITMP1 and REG_ITMP2 is faster than only */ + /* using REG_ITMP1 alternating. */ + s2 = src->regoff; + i386_mov_membase_reg(cd, REG_SP, s2 * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, s2 * 8 + 4, REG_ITMP2); + i386_mov_reg_mem(cd, REG_ITMP1, a); + i386_mov_reg_mem(cd, REG_ITMP2, a + 4); + } else { + panic("PUTSTATIC: longs have to be in memory"); + } + break; + case TYPE_FLT: + var_to_reg_flt(s2, src, REG_FTMP1); + i386_fstps_mem(cd, a); + fpu_st_offset--; + break; + case TYPE_DBL: + var_to_reg_flt(s2, src, REG_FTMP1); + i386_fstpl_mem(cd, a); + fpu_st_offset--; + break; + default: + throw_cacao_exception_exit(string_java_lang_InternalError, + "Unknown PUTSTATIC operand type %d", + iptr->op1); + } + break; + + case ICMD_GETSTATIC: /* ... ==> ..., value */ + /* op1 = type, val.a = field address */ + + /* If the static fields' class is not yet initialized, we do it */ + /* now. The call code is generated later. */ + if (!((fieldinfo *) iptr->val.a)->class->initialized) { + codegen_addclinitref(cd, cd->mcodeptr, ((fieldinfo *) iptr->val.a)->class); + + /* This is just for debugging purposes. Is very difficult to */ + /* read patched code. Here we patch the following 5 nop's */ + /* so that the real code keeps untouched. */ + if (showdisassemble) { + i386_nop(cd); + i386_nop(cd); + i386_nop(cd); + i386_nop(cd); + i386_nop(cd); + } + } + + a = (u4) &(((fieldinfo *) iptr->val.a)->value); + switch (iptr->op1) { + case TYPE_INT: + case TYPE_ADR: + d = reg_of_var(rd, iptr->dst, REG_ITMP1); + i386_mov_mem_reg(cd, a, d); + store_reg_to_var_int(iptr->dst, d); + break; + case TYPE_LNG: + d = reg_of_var(rd, iptr->dst, REG_NULL); + if (iptr->dst->flags & INMEMORY) { + /* Using both REG_ITMP1 and REG_ITMP2 is faster than only */ + /* using REG_ITMP1 alternating. */ + i386_mov_mem_reg(cd, a, REG_ITMP1); + i386_mov_mem_reg(cd, a + 4, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + } else { + panic("GETSTATIC: longs have to be in memory"); + } + break; + case TYPE_FLT: + d = reg_of_var(rd, iptr->dst, REG_FTMP1); + i386_flds_mem(cd, a); + fpu_st_offset++; + store_reg_to_var_flt(iptr->dst, d); + break; + case TYPE_DBL: + d = reg_of_var(rd, iptr->dst, REG_FTMP1); + i386_fldl_mem(cd, a); + fpu_st_offset++; + store_reg_to_var_flt(iptr->dst, d); + break; + default: + throw_cacao_exception_exit(string_java_lang_InternalError, + "Unknown GETSTATIC operand type %d", + iptr->op1); + } + break; + + case ICMD_PUTFIELD: /* ..., value ==> ... */ + /* op1 = type, val.i = field offset */ + + a = ((fieldinfo *) (iptr->val.a))->offset; + switch (iptr->op1) { + case TYPE_INT: + case TYPE_ADR: + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_int(s2, src, REG_ITMP2); + gen_nullptr_check(s1); + i386_mov_reg_membase(cd, s2, s1, a); + break; + case TYPE_LNG: + var_to_reg_int(s1, src->prev, REG_ITMP1); + gen_nullptr_check(s1); + if (src->flags & INMEMORY) { + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2, s1, a); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2, s1, a + 4); + } else { + panic("PUTFIELD: longs have to be in memory"); + } + break; + case TYPE_FLT: + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_flt(s2, src, REG_FTMP1); + gen_nullptr_check(s1); + i386_fstps_membase(cd, s1, a); + fpu_st_offset--; + break; + case TYPE_DBL: + var_to_reg_int(s1, src->prev, REG_ITMP1); + var_to_reg_flt(s2, src, REG_FTMP1); + gen_nullptr_check(s1); + i386_fstpl_membase(cd, s1, a); + fpu_st_offset--; + break; + default: + throw_cacao_exception_exit(string_java_lang_InternalError, + "Unknown PUTFIELD operand type %d", + iptr->op1); + } + break; + + case ICMD_GETFIELD: /* ... ==> ..., value */ + /* op1 = type, val.i = field offset */ + + a = ((fieldinfo *) (iptr->val.a))->offset; + switch (iptr->op1) { + case TYPE_INT: + case TYPE_ADR: + var_to_reg_int(s1, src, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_ITMP2); + gen_nullptr_check(s1); + i386_mov_membase_reg(cd, s1, a, d); + store_reg_to_var_int(iptr->dst, d); + break; + case TYPE_LNG: + var_to_reg_int(s1, src, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_NULL); + gen_nullptr_check(s1); + i386_mov_membase_reg(cd, s1, a, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8); + i386_mov_membase_reg(cd, s1, a + 4, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + break; + case TYPE_FLT: + var_to_reg_int(s1, src, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); + gen_nullptr_check(s1); + i386_flds_membase(cd, s1, a); + fpu_st_offset++; + store_reg_to_var_flt(iptr->dst, d); + break; + case TYPE_DBL: + var_to_reg_int(s1, src, REG_ITMP1); + d = reg_of_var(rd, iptr->dst, REG_FTMP1); + gen_nullptr_check(s1); + i386_fldl_membase(cd, s1, a); + fpu_st_offset++; + store_reg_to_var_flt(iptr->dst, d); + break; + default: + throw_cacao_exception_exit(string_java_lang_InternalError, + "Unknown GETFIELD operand type %d", + iptr->op1); + } + break; + + + /* branch operations **************************************************/ + + case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */ + + var_to_reg_int(s1, src, REG_ITMP1); + M_INTMOVE(s1, REG_ITMP1_XPTR); + + i386_call_imm(cd, 0); /* passing exception pointer */ + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (s4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); + ALIGNCODENOP; + break; + + case ICMD_GOTO: /* ... ==> ... */ + /* op1 = target JavaVM pc */ + + i386_jmp_imm(cd, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); + ALIGNCODENOP; + break; + + case ICMD_JSR: /* ... ==> ... */ + /* op1 = target JavaVM pc */ + + i386_call_imm(cd, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); + break; + + case ICMD_RET: /* ... ==> ... */ + /* op1 = local variable */ + + var = &(rd->locals[iptr->op1][TYPE_ADR]); + var_to_reg_int(s1, var, REG_ITMP1); + i386_jmp_reg(cd, s1); + break; + + case ICMD_IFNULL: /* ..., value ==> ... */ + /* op1 = target JavaVM pc */ + + if (src->flags & INMEMORY) { + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8); } else { - i386_test_reg_reg(src->regoff, src->regoff); + i386_test_reg_reg(cd, src->regoff, src->regoff); } - i386_jcc(I386_CC_E, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_E, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFNONNULL: /* ..., value ==> ... */ /* op1 = target JavaVM pc */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8); } else { - i386_test_reg_reg(src->regoff, src->regoff); + i386_test_reg_reg(cd, src->regoff, src->regoff); } - i386_jcc(I386_CC_NE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_NE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFEQ: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); } else { - i386_alu_imm_reg(I386_CMP, iptr->val.i, src->regoff); + i386_alu_imm_reg(cd, I386_CMP, iptr->val.i, src->regoff); } - i386_jcc(I386_CC_E, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_E, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFLT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); } else { - i386_alu_imm_reg(I386_CMP, iptr->val.i, src->regoff); + i386_alu_imm_reg(cd, I386_CMP, iptr->val.i, src->regoff); } - i386_jcc(I386_CC_L, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_L, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFLE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); } else { - i386_alu_imm_reg(I386_CMP, iptr->val.i, src->regoff); + i386_alu_imm_reg(cd, I386_CMP, iptr->val.i, src->regoff); } - i386_jcc(I386_CC_LE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_LE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFNE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); } else { - i386_alu_imm_reg(I386_CMP, iptr->val.i, src->regoff); + i386_alu_imm_reg(cd, I386_CMP, iptr->val.i, src->regoff); } - i386_jcc(I386_CC_NE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_NE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFGT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); } else { - i386_alu_imm_reg(I386_CMP, iptr->val.i, src->regoff); + i386_alu_imm_reg(cd, I386_CMP, iptr->val.i, src->regoff); } - i386_jcc(I386_CC_G, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_G, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IFGE: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.i = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.i, REG_SP, src->regoff * 8); } else { - i386_alu_imm_reg(I386_CMP, iptr->val.i, src->regoff); + i386_alu_imm_reg(cd, I386_CMP, iptr->val.i, src->regoff); } - i386_jcc(I386_CC_GE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_GE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LEQ: /* ..., value ==> ... */ @@ -3316,39 +3235,39 @@ void codegen() if (src->flags & INMEMORY) { if (iptr->val.l == 0) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_OR, REG_SP, src->regoff * 8 + 4, REG_ITMP1); } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_imm_reg(I386_XOR, iptr->val.l >> 32, REG_ITMP2); - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_imm_reg(I386_XOR, iptr->val.l, REG_ITMP1); - i386_alu_reg_reg(I386_OR, REG_ITMP2, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_alu_imm_reg(cd, I386_XOR, iptr->val.l >> 32, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_imm_reg(cd, I386_XOR, iptr->val.l, REG_ITMP1); + i386_alu_reg_reg(cd, I386_OR, REG_ITMP2, REG_ITMP1); } } - i386_test_reg_reg(REG_ITMP1, REG_ITMP1); - i386_jcc(I386_CC_E, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_test_reg_reg(cd, REG_ITMP1, REG_ITMP1); + i386_jcc(cd, I386_CC_E, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LLT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); - i386_jcc(I386_CC_L, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); + i386_jcc(cd, I386_CC_L, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 6; - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); CALCIMMEDIATEBYTES(a, iptr->val.l); - i386_jcc(I386_CC_G, a); + i386_jcc(cd, I386_CC_G, a); - i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_B, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); + i386_jcc(cd, I386_CC_B, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3356,19 +3275,19 @@ void codegen() /* op1 = target JavaVM pc, val.l = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); - i386_jcc(I386_CC_L, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); + i386_jcc(cd, I386_CC_L, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 6; - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); CALCIMMEDIATEBYTES(a, iptr->val.l); - i386_jcc(I386_CC_G, a); + i386_jcc(cd, I386_CC_G, a); - i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_BE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); + i386_jcc(cd, I386_CC_BE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3377,39 +3296,39 @@ void codegen() if (src->flags & INMEMORY) { if (iptr->val.l == 0) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_OR, REG_SP, src->regoff * 8 + 4, REG_ITMP1); } else { - i386_mov_imm_reg(iptr->val.l, REG_ITMP1); - i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_imm_reg(iptr->val.l >> 32, REG_ITMP2); - i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_reg(I386_OR, REG_ITMP2, REG_ITMP1); + i386_mov_imm_reg(cd, iptr->val.l, REG_ITMP1); + i386_alu_membase_reg(cd, I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_imm_reg(cd, iptr->val.l >> 32, REG_ITMP2); + i386_alu_membase_reg(cd, I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_alu_reg_reg(cd, I386_OR, REG_ITMP2, REG_ITMP1); } } - i386_test_reg_reg(REG_ITMP1, REG_ITMP1); - i386_jcc(I386_CC_NE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_test_reg_reg(cd, REG_ITMP1, REG_ITMP1); + i386_jcc(cd, I386_CC_NE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LGT: /* ..., value ==> ... */ /* op1 = target JavaVM pc, val.l = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); - i386_jcc(I386_CC_G, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); + i386_jcc(cd, I386_CC_G, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 6; - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); CALCIMMEDIATEBYTES(a, iptr->val.l); - i386_jcc(I386_CC_L, a); + i386_jcc(cd, I386_CC_L, a); - i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_A, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); + i386_jcc(cd, I386_CC_A, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3417,19 +3336,19 @@ void codegen() /* op1 = target JavaVM pc, val.l = constant */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); - i386_jcc(I386_CC_G, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4); + i386_jcc(cd, I386_CC_G, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 6; - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); CALCIMMEDIATEBYTES(a, iptr->val.l); - i386_jcc(I386_CC_L, a); + i386_jcc(cd, I386_CC_L, a); - i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_AE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_alu_imm_membase(cd, I386_CMP, iptr->val.l, REG_SP, src->regoff * 8); + i386_jcc(cd, I386_CC_AE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3437,111 +3356,111 @@ void codegen() case ICMD_IF_ACMPEQ: /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); + i386_alu_reg_membase(cd, I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); } else { - i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff); + i386_alu_reg_reg(cd, I386_CMP, src->regoff, src->prev->regoff); } - i386_jcc(I386_CC_E, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_E, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_reg(I386_OR, REG_ITMP2, REG_ITMP1); - i386_test_reg_reg(REG_ITMP1, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); + i386_alu_membase_reg(cd, I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_alu_reg_reg(cd, I386_OR, REG_ITMP2, REG_ITMP1); + i386_test_reg_reg(cd, REG_ITMP1, REG_ITMP1); } - i386_jcc(I386_CC_E, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_E, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */ case ICMD_IF_ACMPNE: /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); + i386_alu_reg_membase(cd, I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); } else { - i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff); + i386_alu_reg_reg(cd, I386_CMP, src->regoff, src->prev->regoff); } - i386_jcc(I386_CC_NE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_NE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_reg(I386_OR, REG_ITMP2, REG_ITMP1); - i386_test_reg_reg(REG_ITMP1, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); + i386_alu_membase_reg(cd, I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2); + i386_alu_reg_reg(cd, I386_OR, REG_ITMP2, REG_ITMP1); + i386_test_reg_reg(cd, REG_ITMP1, REG_ITMP1); } - i386_jcc(I386_CC_NE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_NE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); + i386_alu_reg_membase(cd, I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); } else { - i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff); + i386_alu_reg_reg(cd, I386_CMP, src->regoff, src->prev->regoff); } - i386_jcc(I386_CC_L, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_L, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); - i386_jcc(I386_CC_L, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_jcc(cd, I386_CC_L, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 3 + 6; - CALCREGOFFBYTES(a, src->prev->regoff); - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->prev->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff); - i386_jcc(I386_CC_G, a); + i386_jcc(cd, I386_CC_G, a); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); - i386_jcc(I386_CC_B, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); + i386_jcc(cd, I386_CC_B, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3549,41 +3468,41 @@ void codegen() /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); + i386_alu_reg_membase(cd, I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); } else { - i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff); + i386_alu_reg_reg(cd, I386_CMP, src->regoff, src->prev->regoff); } - i386_jcc(I386_CC_G, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_G, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); - i386_jcc(I386_CC_G, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_jcc(cd, I386_CC_G, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 3 + 6; - CALCREGOFFBYTES(a, src->prev->regoff); - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->prev->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_L, a); + i386_jcc(cd, I386_CC_L, a); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); - i386_jcc(I386_CC_A, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); + i386_jcc(cd, I386_CC_A, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3591,41 +3510,41 @@ void codegen() /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); + i386_alu_reg_membase(cd, I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); } else { - i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff); + i386_alu_reg_reg(cd, I386_CMP, src->regoff, src->prev->regoff); } - i386_jcc(I386_CC_LE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_LE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); - i386_jcc(I386_CC_L, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_jcc(cd, I386_CC_L, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 3 + 6; - CALCREGOFFBYTES(a, src->prev->regoff); - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->prev->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_G, a); + i386_jcc(cd, I386_CC_G, a); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); - i386_jcc(I386_CC_BE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); + i386_jcc(cd, I386_CC_BE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3633,41 +3552,41 @@ void codegen() /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_alu_reg_membase(cd, I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8); } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff); } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); + i386_alu_reg_membase(cd, I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8); } else { - i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff); + i386_alu_reg_reg(cd, I386_CMP, src->regoff, src->prev->regoff); } - i386_jcc(I386_CC_GE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_jcc(cd, I386_CC_GE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); break; case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */ /* op1 = target JavaVM pc */ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); - i386_jcc(I386_CC_G, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1); + i386_jcc(cd, I386_CC_G, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); a = 3 + 3 + 6; - CALCREGOFFBYTES(a, src->prev->regoff); - CALCREGOFFBYTES(a, src->regoff); + CALCOFFSETBYTES(a, REG_SP, src->prev->regoff * 8); + CALCOFFSETBYTES(a, REG_SP, src->regoff * 8); - i386_jcc(I386_CC_L, a); + i386_jcc(cd, I386_CC_L, a); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); - i386_jcc(I386_CC_AE, 0); - codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr); + i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1); + i386_alu_membase_reg(cd, I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1); + i386_jcc(cd, I386_CC_AE, 0); + codegen_addreference(cd, BlockPtrOfPC(iptr->op1), cd->mcodeptr); } break; @@ -3679,182 +3598,182 @@ void codegen() case ICMD_IFEQ_ICONST: /* ..., value ==> ..., constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ifcc_iconst(I386_CC_NE, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ifcc_iconst(cd, I386_CC_NE, src, iptr); break; case ICMD_IFNE_ICONST: /* ..., value ==> ..., constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ifcc_iconst(I386_CC_E, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ifcc_iconst(cd, I386_CC_E, src, iptr); break; case ICMD_IFLT_ICONST: /* ..., value ==> ..., constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ifcc_iconst(I386_CC_GE, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ifcc_iconst(cd, I386_CC_GE, src, iptr); break; case ICMD_IFGE_ICONST: /* ..., value ==> ..., constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ifcc_iconst(I386_CC_L, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ifcc_iconst(cd, I386_CC_L, src, iptr); break; case ICMD_IFGT_ICONST: /* ..., value ==> ..., constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ifcc_iconst(I386_CC_LE, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ifcc_iconst(cd, I386_CC_LE, src, iptr); break; case ICMD_IFLE_ICONST: /* ..., value ==> ..., constant */ /* val.i = constant */ - d = reg_of_var(iptr->dst, REG_NULL); - i386_emit_ifcc_iconst(I386_CC_G, src, iptr); + d = reg_of_var(rd, iptr->dst, REG_NULL); + i386_emit_ifcc_iconst(cd, I386_CC_G, src, iptr); break; case ICMD_IRETURN: /* ..., retvalue ==> ... */ case ICMD_ARETURN: -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 4, REG_SP); - i386_mov_reg_membase(REG_ITMP1, REG_SP, 0); - i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, 4, REG_SP); - } -#endif var_to_reg_int(s1, src, REG_RESULT); M_INTMOVE(s1, REG_RESULT); + goto nowperformreturn; case ICMD_LRETURN: /* ..., retvalue ==> ... */ -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 4, REG_SP); - i386_mov_reg_membase(REG_ITMP1, REG_SP, 0); - i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, 4, REG_SP); - } -#endif if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_RESULT); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_RESULT2); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_RESULT); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_RESULT2); } else { panic("LRETURN: longs have to be in memory"); } - goto nowperformreturn; - - case ICMD_FRETURN: /* ..., retvalue ==> ... */ -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 4, REG_SP); - i386_mov_reg_membase(REG_ITMP1, REG_SP, 0); - i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, 4, REG_SP); - } -#endif - var_to_reg_flt(s1, src, REG_FRESULT); - /* this may be an early return -- keep the offset correct for the remaining code */ - fpu_st_offset--; goto nowperformreturn; + case ICMD_FRETURN: /* ..., retvalue ==> ... */ case ICMD_DRETURN: /* ..., retvalue ==> ... */ -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 4, REG_SP); - i386_mov_reg_membase(REG_ITMP1, REG_SP, 0); - i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, 4, REG_SP); - } -#endif var_to_reg_flt(s1, src, REG_FRESULT); - /* this may be an early return -- keep the offset correct for the remaining code */ + /* this may be an early return -- keep the offset correct for the + remaining code */ fpu_st_offset--; + goto nowperformreturn; case ICMD_RETURN: /* ... ==> ... */ -#ifdef USE_THREADS - if (checksync && (method->flags & ACC_SYNCHRONIZED)) { - i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 4, REG_SP); - i386_mov_reg_membase(REG_ITMP1, REG_SP, 0); - i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, 4, REG_SP); - } -#endif - nowperformreturn: { - int r, p; + s4 i, p; p = parentargs_base; - /* restore saved registers */ - for (r = savintregcnt - 1; r >= maxsavintreguse; r--) { + /* call trace function */ + if (runverbose) { + i386_alu_imm_reg(cd, I386_SUB, 4 + 8 + 8 + 4, REG_SP); + + i386_mov_imm_membase(cd, (s4) m, REG_SP, 0); + + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, 4); + i386_mov_reg_membase(cd, REG_RESULT2, REG_SP, 4 + 4); + + i386_fstl_membase(cd, REG_SP, 4 + 8); + i386_fsts_membase(cd, REG_SP, 4 + 8 + 8); + + i386_mov_imm_reg(cd, (s4) builtin_displaymethodstop, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + + i386_mov_membase_reg(cd, REG_SP, 4, REG_RESULT); + i386_mov_membase_reg(cd, REG_SP, 4 + 4, REG_RESULT2); + + i386_alu_imm_reg(cd, I386_ADD, 4 + 8 + 8 + 4, REG_SP); + } + +#if defined(USE_THREADS) + if (checksync && (m->flags & ACC_SYNCHRONIZED)) { + i386_mov_membase_reg(cd, REG_SP, 8 * rd->maxmemuse, REG_ITMP2); + + /* we need to save the proper return value */ + switch (iptr->opc) { + case ICMD_IRETURN: + case ICMD_ARETURN: + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, rd->maxmemuse * 8); + break; + + case ICMD_LRETURN: + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, rd->maxmemuse * 8); + i386_mov_reg_membase(cd, REG_RESULT2, REG_SP, rd->maxmemuse * 8 + 4); + break; + + case ICMD_FRETURN: + i386_fsts_membase(cd, REG_SP, rd->maxmemuse * 8); + break; + + case ICMD_DRETURN: + i386_fstl_membase(cd, REG_SP, rd->maxmemuse * 8); + break; + } + + i386_alu_imm_reg(cd, I386_SUB, 4, REG_SP); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, 0); + i386_mov_imm_reg(cd, (s4) builtin_monitorexit, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADD, 4, REG_SP); + + /* and now restore the proper return value */ + switch (iptr->opc) { + case ICMD_IRETURN: + case ICMD_ARETURN: + i386_mov_membase_reg(cd, REG_SP, rd->maxmemuse * 8, REG_RESULT); + break; + + case ICMD_LRETURN: + i386_mov_membase_reg(cd, REG_SP, rd->maxmemuse * 8, REG_RESULT); + i386_mov_membase_reg(cd, REG_SP, rd->maxmemuse * 8 + 4, REG_RESULT2); + break; + + case ICMD_FRETURN: + i386_flds_membase(cd, REG_SP, rd->maxmemuse * 8); + break; + + case ICMD_DRETURN: + i386_fldl_membase(cd, REG_SP, rd->maxmemuse * 8); + break; + } + } +#endif + + /* restore saved registers */ + for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) { p--; - i386_mov_membase_reg(REG_SP, p * 8, savintregs[r]); + i386_mov_membase_reg(cd, REG_SP, p * 8, rd->savintregs[i]); } - for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--) { + for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) { p--; - i386_fldl_membase(REG_SP, p * 8); + i386_fldl_membase(cd, REG_SP, p * 8); fpu_st_offset++; if (iptr->opc == ICMD_FRETURN || iptr->opc == ICMD_DRETURN) { - i386_fstp_reg(savfltregs[r] + fpu_st_offset + 1); + i386_fstp_reg(cd, rd->savfltregs[i] + fpu_st_offset + 1); } else { - i386_fstp_reg(savfltregs[r] + fpu_st_offset); + i386_fstp_reg(cd, rd->savfltregs[i] + fpu_st_offset); } fpu_st_offset--; } /* deallocate stack */ if (parentargs_base) { - i386_alu_imm_reg(I386_ADD, parentargs_base * 8, REG_SP); - } - - /* call trace function */ - if (runverbose) { - i386_alu_imm_reg(I386_SUB, 4 + 8 + 8 + 4, REG_SP); - - i386_mov_imm_membase((s4) method, REG_SP, 0); - - i386_mov_reg_membase(REG_RESULT, REG_SP, 4); - i386_mov_reg_membase(REG_RESULT2, REG_SP, 4 + 4); - - i386_fstl_membase(REG_SP, 4 + 8); - i386_fsts_membase(REG_SP, 4 + 8 + 8); - - i386_mov_imm_reg((s4) builtin_displaymethodstop, REG_ITMP1); -/* i386_mov_imm_reg(asm_builtin_exittrace, REG_ITMP1); */ - i386_call_reg(REG_ITMP1); - - i386_mov_membase_reg(REG_SP, 4, REG_RESULT); - i386_mov_membase_reg(REG_SP, 4 + 4, REG_RESULT2); - - i386_alu_imm_reg(I386_ADD, 4 + 8 + 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_ADD, parentargs_base * 8, REG_SP); } - i386_ret(); + i386_ret(cd); ALIGNCODENOP; } break; @@ -3874,17 +3793,17 @@ nowperformreturn: var_to_reg_int(s1, src, REG_ITMP1); M_INTMOVE(s1, REG_ITMP1); if (l != 0) { - i386_alu_imm_reg(I386_SUB, l, REG_ITMP1); + i386_alu_imm_reg(cd, I386_SUB, l, REG_ITMP1); } i = i - l + 1; /* range check */ - i386_alu_imm_reg(I386_CMP, i - 1, REG_ITMP1); - i386_jcc(I386_CC_A, 0); + i386_alu_imm_reg(cd, I386_CMP, i - 1, REG_ITMP1); + i386_jcc(cd, I386_CC_A, 0); - /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */ - codegen_addreference((basicblock *) tptr[0], mcodeptr); + /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), cd->mcodeptr); */ + codegen_addreference(cd, (basicblock *) tptr[0], cd->mcodeptr); /* build jump table top down and use address of lowest entry */ @@ -3892,17 +3811,17 @@ nowperformreturn: tptr += i; while (--i >= 0) { - /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */ - dseg_addtarget((basicblock *) tptr[0]); + /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */ + dseg_addtarget(cd, (basicblock *) tptr[0]); --tptr; } /* length of dataseg after last dseg_addtarget is used by load */ - i386_mov_imm_reg(0, REG_ITMP2); - dseg_adddata(mcodeptr); - i386_mov_memindex_reg(-dseglen, REG_ITMP2, REG_ITMP1, 2, REG_ITMP1); - i386_jmp_reg(REG_ITMP1); + i386_mov_imm_reg(cd, 0, REG_ITMP2); + dseg_adddata(cd, cd->mcodeptr); + i386_mov_memindex_reg(cd, -(cd->dseglen), REG_ITMP2, REG_ITMP1, 2, REG_ITMP1); + i386_jmp_reg(cd, REG_ITMP1); ALIGNCODENOP; } break; @@ -3926,17 +3845,17 @@ nowperformreturn: ++tptr; val = s4ptr[0]; - i386_alu_imm_reg(I386_CMP, val, s1); - i386_jcc(I386_CC_E, 0); - /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */ - codegen_addreference((basicblock *) tptr[0], mcodeptr); + i386_alu_imm_reg(cd, I386_CMP, val, s1); + i386_jcc(cd, I386_CC_E, 0); + /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), cd->mcodeptr); */ + codegen_addreference(cd, (basicblock *) tptr[0], cd->mcodeptr); } - i386_jmp_imm(0); - /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */ + i386_jmp_imm(cd, 0); + /* codegen_addreference(cd, BlockPtrOfPC(l), cd->mcodeptr); */ tptr = (void **) iptr->target; - codegen_addreference((basicblock *) tptr[0], mcodeptr); + codegen_addreference(cd, (basicblock *) tptr[0], cd->mcodeptr); ALIGNCODENOP; } @@ -3973,8 +3892,7 @@ nowperformreturn: s3 = iptr->op1; gen_method: { - methodinfo *m; - classinfo *ci; + methodinfo *lm; MCODECHECK((s3 << 1) + 64); @@ -3986,17 +3904,17 @@ gen_method: { } if (IS_INT_LNG_TYPE(src->type)) { - if (s3 < intreg_argnum) { + if (s3 < rd->intreg_argnum) { panic("No integer argument registers available!"); } else { if (!IS_2_WORD_TYPE(src->type)) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, s3 * 8); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, s3 * 8); } else { - i386_mov_reg_membase(src->regoff, REG_SP, s3 * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, s3 * 8); } } else { @@ -4010,97 +3928,87 @@ gen_method: { } } else { - if (s3 < fltreg_argnum) { + if (s3 < rd->fltreg_argnum) { panic("No float argument registers available!"); } else { var_to_reg_flt(d, src, REG_FTMP1); if (src->type == TYPE_FLT) { - i386_fstps_membase(REG_SP, s3 * 8); + i386_fstps_membase(cd, REG_SP, s3 * 8); } else { - i386_fstpl_membase(REG_SP, s3 * 8); + i386_fstpl_membase(cd, REG_SP, s3 * 8); } } } } /* end of for */ - m = iptr->val.a; + lm = iptr->val.a; switch (iptr->opc) { - case ICMD_BUILTIN3: - case ICMD_BUILTIN2: - case ICMD_BUILTIN1: - - a = (s4) m; - d = iptr->op1; - - i386_mov_imm_reg(a, REG_ITMP1); - i386_call_reg(REG_ITMP1); - break; - - case ICMD_INVOKESTATIC: - - a = (s4) m->stubroutine; - d = m->returntype; - - i386_mov_imm_reg(a, REG_ITMP2); - i386_call_reg(REG_ITMP2); - break; - - case ICMD_INVOKESPECIAL: - - a = (s4) m->stubroutine; - d = m->returntype; + case ICMD_BUILTIN3: + case ICMD_BUILTIN2: + case ICMD_BUILTIN1: + a = (u4) lm; + d = iptr->op1; + + i386_mov_imm_reg(cd, a, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + break; - i386_mov_membase_reg(REG_SP, 0, REG_ITMP1); - gen_nullptr_check(REG_ITMP1); - i386_mov_membase_reg(REG_ITMP1, 0, REG_ITMP1); /* access memory for hardware nullptr */ + case ICMD_INVOKESTATIC: + a = (u4) lm->stubroutine; + d = lm->returntype; - i386_mov_imm_reg(a, REG_ITMP2); - i386_call_reg(REG_ITMP2); - break; + i386_mov_imm_reg(cd, a, REG_ITMP2); + i386_call_reg(cd, REG_ITMP2); + break; - case ICMD_INVOKEVIRTUAL: + case ICMD_INVOKESPECIAL: + a = (u4) lm->stubroutine; + d = lm->returntype; - d = m->returntype; + i386_mov_membase_reg(cd, REG_SP, 0, REG_ITMP1); + gen_nullptr_check(REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP1, 0, REG_ITMP1); /* access memory for hardware nullptr */ - i386_mov_membase_reg(REG_SP, 0, REG_ITMP1); - gen_nullptr_check(REG_ITMP1); - i386_mov_membase_reg(REG_ITMP1, OFFSET(java_objectheader, vftbl), REG_ITMP2); - i386_mov_membase32_reg(REG_ITMP2, OFFSET(vftbl, table[0]) + sizeof(methodptr) * m->vftblindex, REG_ITMP1); + i386_mov_imm_reg(cd, a, REG_ITMP2); + i386_call_reg(cd, REG_ITMP2); + break; - i386_call_reg(REG_ITMP1); - break; + case ICMD_INVOKEVIRTUAL: + d = lm->returntype; - case ICMD_INVOKEINTERFACE: + i386_mov_membase_reg(cd, REG_SP, 0, REG_ITMP1); + gen_nullptr_check(REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(java_objectheader, vftbl), REG_ITMP2); + i386_mov_membase32_reg(cd, REG_ITMP2, OFFSET(vftbl_t, table[0]) + sizeof(methodptr) * lm->vftblindex, REG_ITMP1); - ci = m->class; - d = m->returntype; + i386_call_reg(cd, REG_ITMP1); + break; - i386_mov_membase_reg(REG_SP, 0, REG_ITMP1); - gen_nullptr_check(REG_ITMP1); - i386_mov_membase_reg(REG_ITMP1, OFFSET(java_objectheader, vftbl), REG_ITMP1); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - sizeof(methodptr) * ci->index, REG_ITMP2); - i386_mov_membase32_reg(REG_ITMP2, sizeof(methodptr) * (m - ci->methods), REG_ITMP1); + case ICMD_INVOKEINTERFACE: + d = lm->returntype; - i386_call_reg(REG_ITMP1); - break; + i386_mov_membase_reg(cd, REG_SP, 0, REG_ITMP1); + gen_nullptr_check(REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(java_objectheader, vftbl), REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - sizeof(methodptr) * lm->class->index, REG_ITMP2); + i386_mov_membase32_reg(cd, REG_ITMP2, sizeof(methodptr) * (lm - lm->class->methods), REG_ITMP1); - default: - d = 0; - error("Unkown ICMD-Command: %d", iptr->opc); - } + i386_call_reg(cd, REG_ITMP1); + break; + } /* d contains return type */ if (d != TYPE_VOID) { - d = reg_of_var(iptr->dst, REG_NULL); + d = reg_of_var(rd, iptr->dst, REG_NULL); if (IS_INT_LNG_TYPE(iptr->dst->type)) { if (IS_2_WORD_TYPE(iptr->dst->type)) { if (iptr->dst->flags & INMEMORY) { - i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4); } else { panic("RETURN: longs have to be in memory"); @@ -4108,7 +4016,7 @@ gen_method: { } else { if (iptr->dst->flags & INMEMORY) { - i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, iptr->dst->regoff * 8); } else { M_INTMOVE(REG_RESULT, iptr->dst->regoff); @@ -4146,80 +4054,84 @@ gen_method: { { classinfo *super = (classinfo*) iptr->val.a; +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase); +#endif var_to_reg_int(s1, src, REG_ITMP1); - d = reg_of_var(iptr->dst, REG_ITMP3); + d = reg_of_var(rd, iptr->dst, REG_ITMP3); if (s1 == d) { M_INTMOVE(s1, REG_ITMP1); s1 = REG_ITMP1; } - i386_alu_reg_reg(I386_XOR, d, d); + i386_alu_reg_reg(cd, I386_XOR, d, d); if (iptr->op1) { /* class/interface */ if (super->flags & ACC_INTERFACE) { /* interface */ - i386_test_reg_reg(s1, s1); + i386_test_reg_reg(cd, s1, s1); /* TODO: clean up this calculation */ a = 2; - CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl)); + CALCOFFSETBYTES(a, s1, OFFSET(java_objectheader, vftbl)); a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetablelength)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength)); a += 2; - CALCOFFSETBYTES(a, super->index); +/* CALCOFFSETBYTES(a, super->index); */ + CALCIMMEDIATEBYTES(a, super->index); a += 3; a += 6; a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - super->index * sizeof(methodptr*)); a += 3; a += 6; /* jcc */ a += 5; - i386_jcc(I386_CC_E, a); + i386_jcc(cd, I386_CC_E, a); - i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetablelength), REG_ITMP2); - i386_alu_imm_reg(I386_SUB, super->index, REG_ITMP2); + i386_mov_membase_reg(cd, s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength), REG_ITMP2); + i386_alu_imm_reg(cd, I386_SUB, super->index, REG_ITMP2); /* TODO: test */ - i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2); + i386_alu_imm_reg(cd, I386_CMP, 0, REG_ITMP2); /* TODO: clean up this calculation */ a = 0; a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - super->index * sizeof(methodptr*)); a += 3; a += 6; /* jcc */ a += 5; - i386_jcc(I386_CC_LE, a); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP1); + i386_jcc(cd, I386_CC_LE, a); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP1); /* TODO: test */ - i386_alu_imm_reg(I386_CMP, 0, REG_ITMP1); -/* i386_setcc_reg(I386_CC_A, d); */ -/* i386_jcc(I386_CC_BE, 5); */ - i386_jcc(I386_CC_E, 5); - i386_mov_imm_reg(1, d); + i386_alu_imm_reg(cd, I386_CMP, 0, REG_ITMP1); +/* i386_setcc_reg(cd, I386_CC_A, d); */ +/* i386_jcc(cd, I386_CC_BE, 5); */ + i386_jcc(cd, I386_CC_E, 5); + i386_mov_imm_reg(cd, 1, d); } else { /* class */ - i386_test_reg_reg(s1, s1); + i386_test_reg_reg(cd, s1, s1); /* TODO: clean up this calculation */ a = 2; - CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl)); + CALCOFFSETBYTES(a, s1, OFFSET(java_objectheader, vftbl)); a += 5; a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, baseval)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, baseval)); a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, baseval)); + CALCOFFSETBYTES(a, REG_ITMP2, OFFSET(vftbl_t, baseval)); a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, diffval)); + CALCOFFSETBYTES(a, REG_ITMP2, OFFSET(vftbl_t, diffval)); a += 2; a += 2; /* xor */ @@ -4229,18 +4141,25 @@ gen_method: { a += 6; /* jcc */ a += 5; - i386_jcc(I386_CC_E, a); - - i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); - i386_mov_imm_reg((s4) super->vftbl, REG_ITMP2); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, baseval), REG_ITMP1); - i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP3); - i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2); - i386_alu_reg_reg(I386_SUB, REG_ITMP3, REG_ITMP1); - i386_alu_reg_reg(I386_XOR, d, d); - i386_alu_reg_reg(I386_CMP, REG_ITMP2, REG_ITMP1); - i386_jcc(I386_CC_A, 5); - i386_mov_imm_reg(1, d); + i386_jcc(cd, I386_CC_E, a); + + i386_mov_membase_reg(cd, s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); + i386_mov_imm_reg(cd, (s4) super->vftbl, REG_ITMP2); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase); +#endif + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, baseval), REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, baseval), REG_ITMP3); + i386_mov_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, diffval), REG_ITMP2); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase); +#endif + i386_alu_reg_reg(cd, I386_SUB, REG_ITMP3, REG_ITMP1); + i386_alu_reg_reg(cd, I386_XOR, d, d); + + i386_alu_reg_reg(cd, I386_CMP, REG_ITMP2, REG_ITMP1); + i386_jcc(cd, I386_CC_A, 5); + i386_mov_imm_reg(cd, 1, d); } } else @@ -4270,102 +4189,116 @@ gen_method: { { classinfo *super = (classinfo*) iptr->val.a; - d = reg_of_var(iptr->dst, REG_ITMP3); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase); +#endif + d = reg_of_var(rd, iptr->dst, REG_ITMP3); var_to_reg_int(s1, src, d); if (iptr->op1) { /* class/interface */ if (super->flags & ACC_INTERFACE) { /* interface */ - i386_test_reg_reg(s1, s1); + i386_test_reg_reg(cd, s1, s1); /* TODO: clean up this calculation */ a = 2; - CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl)); + CALCOFFSETBYTES(a, s1, OFFSET(java_objectheader, vftbl)); a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetablelength)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength)); a += 2; - CALCOFFSETBYTES(a, super->index); +/* CALCOFFSETBYTES(a, super->index); */ + CALCIMMEDIATEBYTES(a, super->index); a += 3; a += 6; a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - super->index * sizeof(methodptr*)); a += 3; a += 6; - i386_jcc(I386_CC_E, a); + i386_jcc(cd, I386_CC_E, a); - i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetablelength), REG_ITMP2); - i386_alu_imm_reg(I386_SUB, super->index, REG_ITMP2); + i386_mov_membase_reg(cd, s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength), REG_ITMP2); + i386_alu_imm_reg(cd, I386_SUB, super->index, REG_ITMP2); /* TODO: test */ - i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2); - i386_jcc(I386_CC_LE, 0); - codegen_addxcastrefs(mcodeptr); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP2); + i386_alu_imm_reg(cd, I386_CMP, 0, REG_ITMP2); + i386_jcc(cd, I386_CC_LE, 0); + codegen_addxcastrefs(cd, cd->mcodeptr); + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP2); /* TODO: test */ - i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2); - i386_jcc(I386_CC_E, 0); - codegen_addxcastrefs(mcodeptr); + i386_alu_imm_reg(cd, I386_CMP, 0, REG_ITMP2); + i386_jcc(cd, I386_CC_E, 0); + codegen_addxcastrefs(cd, cd->mcodeptr); } else { /* class */ - i386_test_reg_reg(s1, s1); + i386_test_reg_reg(cd, s1, s1); /* TODO: clean up this calculation */ a = 2; - CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl)); + CALCOFFSETBYTES(a, s1, OFFSET(java_objectheader, vftbl)); a += 5; a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, baseval)); + CALCOFFSETBYTES(a, REG_ITMP1, OFFSET(vftbl_t, baseval)); if (d != REG_ITMP3) { a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, baseval)); + CALCOFFSETBYTES(a, REG_ITMP2, OFFSET(vftbl_t, baseval)); a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, diffval)); + CALCOFFSETBYTES(a, REG_ITMP2, OFFSET(vftbl_t, diffval)); a += 2; } else { a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, baseval)); + CALCOFFSETBYTES(a, REG_ITMP2, OFFSET(vftbl_t, baseval)); a += 2; a += 5; a += 2; - CALCOFFSETBYTES(a, OFFSET(vftbl, diffval)); + CALCOFFSETBYTES(a, REG_ITMP2, OFFSET(vftbl_t, diffval)); } a += 2; a += 6; - i386_jcc(I386_CC_E, a); + i386_jcc(cd, I386_CC_E, a); - i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); - i386_mov_imm_reg((s4) super->vftbl, REG_ITMP2); - i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, baseval), REG_ITMP1); + i386_mov_membase_reg(cd, s1, OFFSET(java_objectheader, vftbl), REG_ITMP1); + i386_mov_imm_reg(cd, (s4) super->vftbl, REG_ITMP2); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase); +#endif + i386_mov_membase_reg(cd, REG_ITMP1, OFFSET(vftbl_t, baseval), REG_ITMP1); if (d != REG_ITMP3) { - i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP3); - i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2); - i386_alu_reg_reg(I386_SUB, REG_ITMP3, REG_ITMP1); + i386_mov_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, baseval), REG_ITMP3); + i386_mov_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, diffval), REG_ITMP2); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase); +#endif + i386_alu_reg_reg(cd, I386_SUB, REG_ITMP3, REG_ITMP1); } else { - i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP2); - i386_alu_reg_reg(I386_SUB, REG_ITMP2, REG_ITMP1); - i386_mov_imm_reg((s4) super->vftbl, REG_ITMP2); - i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2); + i386_mov_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, baseval), REG_ITMP2); + i386_alu_reg_reg(cd, I386_SUB, REG_ITMP2, REG_ITMP1); + i386_mov_imm_reg(cd, (s4) super->vftbl, REG_ITMP2); + i386_mov_membase_reg(cd, REG_ITMP2, OFFSET(vftbl_t, diffval), REG_ITMP2); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase); +#endif } - i386_alu_reg_reg(I386_CMP, REG_ITMP2, REG_ITMP1); - i386_jcc(I386_CC_A, 0); /* (u) REG_ITMP1 > (u) REG_ITMP2 -> jump */ - codegen_addxcastrefs(mcodeptr); + + i386_alu_reg_reg(cd, I386_CMP, REG_ITMP2, REG_ITMP1); + i386_jcc(cd, I386_CC_A, 0); /* (u) REG_ITMP1 > (u) REG_ITMP2 -> jump */ + codegen_addxcastrefs(cd, cd->mcodeptr); } } else @@ -4378,13 +4311,20 @@ gen_method: { case ICMD_CHECKASIZE: /* ..., size ==> ..., size */ if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8); } else { - i386_test_reg_reg(src->regoff, src->regoff); + i386_test_reg_reg(cd, src->regoff, src->regoff); } - i386_jcc(I386_CC_L, 0); - codegen_addxcheckarefs(mcodeptr); + i386_jcc(cd, I386_CC_L, 0); + codegen_addxcheckarefs(cd, cd->mcodeptr); + break; + + case ICMD_CHECKEXCEPTION: /* ... ==> ... */ + + i386_test_reg_reg(cd, REG_RESULT, REG_RESULT); + i386_jcc(cd, I386_CC_E, 0); + codegen_addxexceptionrefs(cd, cd->mcodeptr); break; case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */ @@ -4396,65 +4336,65 @@ gen_method: { for (s1 = iptr->op1; --s1 >= 0; src = src->prev) { if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); + i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8); } else { - i386_test_reg_reg(src->regoff, src->regoff); + i386_test_reg_reg(cd, src->regoff, src->regoff); } - i386_jcc(I386_CC_L, 0); - codegen_addxcheckarefs(mcodeptr); + i386_jcc(cd, I386_CC_L, 0); + codegen_addxcheckarefs(cd, cd->mcodeptr); /* * copy sizes to new stack location, be cause native function * builtin_nmultianewarray access them as (int *) */ - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, -(iptr->op1 - s1) * 4); + i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, -(iptr->op1 - s1) * 4); /* copy sizes to stack (argument numbers >= INT_ARG_CNT) */ if (src->varkind != ARGVAR) { if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, (src->regoff + intreg_argnum) * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, (s1 + intreg_argnum) * 8); + i386_mov_membase_reg(cd, REG_SP, (src->regoff + INT_ARG_CNT) * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, (s1 + INT_ARG_CNT) * 8); } else { - i386_mov_reg_membase(src->regoff, REG_SP, (s1 + intreg_argnum) * 8); + i386_mov_reg_membase(cd, src->regoff, REG_SP, (s1 + INT_ARG_CNT) * 8); } } } - i386_alu_imm_reg(I386_SUB, iptr->op1 * 4, REG_SP); + i386_alu_imm_reg(cd, I386_SUB, iptr->op1 * 4, REG_SP); /* a0 = dimension count */ /* save stack pointer */ M_INTMOVE(REG_SP, REG_ITMP1); - i386_alu_imm_reg(I386_SUB, 12, REG_SP); - i386_mov_imm_membase(iptr->op1, REG_SP, 0); + i386_alu_imm_reg(cd, I386_SUB, 12, REG_SP); + i386_mov_imm_membase(cd, iptr->op1, REG_SP, 0); /* a1 = arraydescriptor */ - i386_mov_imm_membase((s4) iptr->val.a, REG_SP, 4); + i386_mov_imm_membase(cd, (s4) iptr->val.a, REG_SP, 4); /* a2 = pointer to dimensions = stack pointer */ - i386_mov_reg_membase(REG_ITMP1, REG_SP, 8); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, 8); - i386_mov_imm_reg((s4) (builtin_nmultianewarray), REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, 12 + iptr->op1 * 4, REG_SP); + i386_mov_imm_reg(cd, (s4) (builtin_nmultianewarray), REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_alu_imm_reg(cd, I386_ADD, 12 + iptr->op1 * 4, REG_SP); - s1 = reg_of_var(iptr->dst, REG_RESULT); + s1 = reg_of_var(rd, iptr->dst, REG_RESULT); M_INTMOVE(REG_RESULT, s1); store_reg_to_var_int(iptr->dst, s1); break; - - default: error ("Unknown pseudo command: %d", iptr->opc); - - - + case ICMD_INLINE_START: + case ICMD_INLINE_END: + break; + default: + error ("Unknown pseudo command: %d", iptr->opc); } /* switch */ } /* for instruction */ @@ -4464,14 +4404,17 @@ gen_method: { src = bptr->outstack; len = bptr->outdepth; MCODECHECK(64+len); +#ifdef LSRA + if (!opt_lsra) +#endif while (src) { len--; if ((src->varkind != STACKVAR)) { s2 = src->type; if (IS_FLT_DBL_TYPE(s2)) { var_to_reg_flt(s1, src, REG_FTMP1); - if (!(interfaces[len][s2].flags & INMEMORY)) { - M_FLTMOVE(s1,interfaces[len][s2].regoff); + if (!(rd->interfaces[len][s2].flags & INMEMORY)) { + M_FLTMOVE(s1, rd->interfaces[len][s2].regoff); } else { panic("double store"); @@ -4480,17 +4423,17 @@ gen_method: { } else { var_to_reg_int(s1, src, REG_ITMP1); - if (!IS_2_WORD_TYPE(interfaces[len][s2].type)) { - if (!(interfaces[len][s2].flags & INMEMORY)) { - M_INTMOVE(s1, interfaces[len][s2].regoff); + if (!IS_2_WORD_TYPE(rd->interfaces[len][s2].type)) { + if (!(rd->interfaces[len][s2].flags & INMEMORY)) { + M_INTMOVE(s1, rd->interfaces[len][s2].regoff); } else { - i386_mov_reg_membase(s1, REG_SP, interfaces[len][s2].regoff * 8); + i386_mov_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8); } } else { - if (interfaces[len][s2].flags & INMEMORY) { - M_LNGMEMMOVE(s1, interfaces[len][s2].regoff); + if (rd->interfaces[len][s2].flags & INMEMORY) { + M_LNGMEMMOVE(s1, rd->interfaces[len][s2].regoff); } else { panic("copy interface registers: longs have to be in memory (end)"); @@ -4503,173 +4446,443 @@ gen_method: { } /* if (bptr -> flags >= BBREACHED) */ } /* for basic block */ - /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */ + codegen_createlinenumbertable(cd); { /* generate bound check stubs */ + u1 *xcodeptr = NULL; - - for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) { - if ((exceptiontablelength == 0) && (xcodeptr != NULL)) { - gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos, - xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2)); - continue; - } + branchref *bref; + for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) { + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + cd->mcodeptr - cd->mcodebase); - gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos, - xboundrefs->branchpos, (u1*) mcodeptr - mcodebase); + MCODECHECK(100); - MCODECHECK(8); + /* move index register into REG_ITMP1 */ + i386_mov_reg_reg(cd, bref->reg, REG_ITMP1); /* 2 bytes */ - i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */ - dseg_adddata(mcodeptr); - i386_mov_imm_reg(xboundrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */ - i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ + i386_mov_imm_reg(cd, 0, REG_ITMP2_XPC); /* 5 bytes */ + dseg_adddata(cd, cd->mcodeptr); + i386_mov_imm_reg(cd, bref->branchpos - 6, REG_ITMP3); /* 5 bytes */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP3, REG_ITMP2_XPC); /* 2 bytes */ if (xcodeptr != NULL) { - i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5); + i386_jmp_imm(cd, (xcodeptr - cd->mcodeptr) - 5); } else { - xcodeptr = mcodeptr; + xcodeptr = cd->mcodeptr; + + i386_push_reg(cd, REG_ITMP2_XPC); + + /*PREPARE_NATIVE_STACKINFO;*/ + i386_push_imm(cd,0); /* the pushed XPC is directly below the java frame*/ + i386_push_imm(cd,0); + i386_mov_imm_reg(cd,(s4)asm_prepare_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + i386_alu_imm_reg(cd, I386_SUB, 1 * 4, REG_SP); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, 0 * 4); + i386_mov_imm_reg(cd, (u4) new_arrayindexoutofboundsexception, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /* return value is REG_ITMP1_XPTR */ + i386_alu_imm_reg(cd, I386_ADD, 1 * 4, REG_SP); - i386_mov_imm_reg((s4) proto_java_lang_ArrayIndexOutOfBoundsException, REG_ITMP1_XPTR); - i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI); - i386_jmp_reg(I386_EDI); + /*REMOVE_NATIVE_STACKINFO;*/ + i386_mov_imm_reg(cd,(s4)asm_remove_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (s4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); } } /* generate negative array size check stubs */ + xcodeptr = NULL; - for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) { - if ((exceptiontablelength == 0) && (xcodeptr != NULL)) { - gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos, - xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2)); + for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) { + if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) { + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + xcodeptr - cd->mcodebase - (5 + 5 + 2)); continue; - } + } - gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos, - xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase); + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + cd->mcodeptr - cd->mcodebase); - MCODECHECK(8); + MCODECHECK(100); - i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */ - dseg_adddata(mcodeptr); - i386_mov_imm_reg(xcheckarefs->branchpos - 6, REG_ITMP1); /* 5 bytes */ - i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ + i386_mov_imm_reg(cd, 0, REG_ITMP2_XPC); /* 5 bytes */ + dseg_adddata(cd, cd->mcodeptr); + i386_mov_imm_reg(cd, bref->branchpos - 6, REG_ITMP1); /* 5 bytes */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ if (xcodeptr != NULL) { - i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5); + i386_jmp_imm(cd, (xcodeptr - cd->mcodeptr) - 5); } else { - xcodeptr = mcodeptr; + xcodeptr = cd->mcodeptr; + + i386_push_reg(cd, REG_ITMP2_XPC); + + /*PREPARE_NATIVE_STACKINFO;*/ + i386_push_imm(cd,0); /* the pushed XPC is directly below the java frame*/ + i386_push_imm(cd,0); + i386_mov_imm_reg(cd,(s4)asm_prepare_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + + i386_mov_imm_reg(cd, (u4) new_negativearraysizeexception, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /* return value is REG_ITMP1_XPTR */ + /*i386_alu_imm_reg(cd, I386_ADD, 1 * 4, REG_SP);*/ + + + /*REMOVE_NATIVE_STACKINFO;*/ + i386_mov_imm_reg(cd,(s4)asm_remove_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); - i386_mov_imm_reg((s4) proto_java_lang_NegativeArraySizeException, REG_ITMP1_XPTR); - i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI); - i386_jmp_reg(I386_EDI); + + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (s4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); } } /* generate cast check stubs */ + xcodeptr = NULL; - for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) { - if ((exceptiontablelength == 0) && (xcodeptr != NULL)) { - gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos, - xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2)); + for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) { + if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) { + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + xcodeptr - cd->mcodebase - (5 + 5 + 2)); continue; } - gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos, - xcastrefs->branchpos, (u1*) mcodeptr - mcodebase); + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + cd->mcodeptr - cd->mcodebase); - MCODECHECK(8); + MCODECHECK(100); - i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */ - dseg_adddata(mcodeptr); - i386_mov_imm_reg(xcastrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */ - i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ + i386_mov_imm_reg(cd, 0, REG_ITMP2_XPC); /* 5 bytes */ + dseg_adddata(cd, cd->mcodeptr); + i386_mov_imm_reg(cd, bref->branchpos - 6, REG_ITMP1); /* 5 bytes */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ if (xcodeptr != NULL) { - i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5); + i386_jmp_imm(cd, (xcodeptr - cd->mcodeptr) - 5); } else { - xcodeptr = mcodeptr; + xcodeptr = cd->mcodeptr; + + i386_push_reg(cd, REG_ITMP2_XPC); + + /*PREPARE_NATIVE_STACKINFO;*/ + i386_push_imm(cd,0); /* the pushed XPC is directly below the java frame*/ + i386_push_imm(cd,0); + i386_mov_imm_reg(cd,(s4)asm_prepare_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + i386_mov_imm_reg(cd, (u4) new_classcastexception, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /* return value is REG_ITMP1_XPTR */ + /*i386_alu_imm_reg(cd, I386_ADD, 1 * 4, REG_SP);*/ + - i386_mov_imm_reg((s4) proto_java_lang_ClassCastException, REG_ITMP1_XPTR); - i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI); - i386_jmp_reg(I386_EDI); + /*REMOVE_NATIVE_STACKINFO;*/ + i386_mov_imm_reg(cd,(s4)asm_remove_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (u4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); } } /* generate divide by zero check stubs */ + xcodeptr = NULL; - for (; xdivrefs != NULL; xdivrefs = xdivrefs->next) { - if ((exceptiontablelength == 0) && (xcodeptr != NULL)) { - gen_resolvebranch((u1*) mcodebase + xdivrefs->branchpos, - xdivrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2)); + for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) { + if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) { + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + xcodeptr - cd->mcodebase - (5 + 5 + 2)); continue; } - gen_resolvebranch((u1*) mcodebase + xdivrefs->branchpos, - xdivrefs->branchpos, (u1*) mcodeptr - mcodebase); + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + cd->mcodeptr - cd->mcodebase); - MCODECHECK(8); + MCODECHECK(100); - i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */ - dseg_adddata(mcodeptr); - i386_mov_imm_reg(xdivrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */ - i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ + i386_mov_imm_reg(cd, 0, REG_ITMP2_XPC); /* 5 bytes */ + dseg_adddata(cd, cd->mcodeptr); + i386_mov_imm_reg(cd, bref->branchpos - 6, REG_ITMP1); /* 5 bytes */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ if (xcodeptr != NULL) { - i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5); + i386_jmp_imm(cd, (xcodeptr - cd->mcodeptr) - 5); } else { - xcodeptr = mcodeptr; + xcodeptr = cd->mcodeptr; + + i386_push_reg(cd, REG_ITMP2_XPC); + + /*PREPARE_NATIVE_STACKINFO;*/ + i386_push_imm(cd,0); /* the pushed XPC is directly below the java frame*/ + i386_push_imm(cd,0); + i386_mov_imm_reg(cd,(s4)asm_prepare_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + - i386_mov_imm_reg((s4) proto_java_lang_ArithmeticException, REG_ITMP1_XPTR); - i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI); - i386_jmp_reg(I386_EDI); + i386_mov_imm_reg(cd, (u4) new_arithmeticexception, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /* return value is REG_ITMP1_XPTR */ + + /*REMOVE_NATIVE_STACKINFO;*/ + i386_mov_imm_reg(cd,(s4)asm_remove_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (s4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); } } - /* generate null pointer check stubs */ + /* generate exception check stubs */ + xcodeptr = NULL; - for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) { - if ((exceptiontablelength == 0) && (xcodeptr != NULL)) { - gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos, - xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2)); + for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) { + if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) { + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + xcodeptr - cd->mcodebase - (5 + 5 + 2)); continue; } - gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos, - xnullrefs->branchpos, (u1*) mcodeptr - mcodebase); - - MCODECHECK(8); + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + cd->mcodeptr - cd->mcodebase); + + MCODECHECK(200); + + i386_mov_imm_reg(cd, 0, REG_ITMP2_XPC); /* 5 bytes */ + dseg_adddata(cd, cd->mcodeptr); + i386_mov_imm_reg(cd, bref->branchpos - 6, REG_ITMP1); /* 5 bytes */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ - i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */ - dseg_adddata(mcodeptr); - i386_mov_imm_reg(xnullrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */ - i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ - if (xcodeptr != NULL) { - i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5); - + i386_jmp_imm(cd, (xcodeptr - cd->mcodeptr) - 5); + } else { - xcodeptr = mcodeptr; - - i386_mov_imm_reg((s4) proto_java_lang_NullPointerException, REG_ITMP1_XPTR); - i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI); - i386_jmp_reg(I386_EDI); - } - } - } + xcodeptr = cd->mcodeptr; - codegen_finish((int)((u1*) mcodeptr - mcodebase)); + i386_push_reg(cd, REG_ITMP2_XPC); + + /*PREPARE_NATIVE_STACKINFO;*/ + i386_push_imm(cd,0); /* the pushed XPC is directly below the java frame*/ + i386_push_imm(cd,0); + i386_mov_imm_reg(cd,(s4)asm_prepare_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + i386_mov_imm_reg(cd, (s4) codegen_general_stubcalled, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + i386_mov_imm_reg(cd, (s4) &builtin_get_exceptionptrptr, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_mov_membase_reg(cd, REG_RESULT, 0, REG_ITMP3); + i386_mov_imm_membase(cd, 0, REG_RESULT, 0); + i386_mov_reg_reg(cd, REG_ITMP3, REG_ITMP1_XPTR); +#else + i386_mov_imm_reg(cd, (s4) &_exceptionptr, REG_ITMP3); + i386_mov_membase_reg(cd, REG_ITMP3, 0, REG_ITMP1_XPTR); + i386_mov_imm_membase(cd, 0, REG_ITMP3, 0); +#endif + i386_push_imm(cd, 0); + i386_push_reg(cd, REG_ITMP1_XPTR); + +/*get the fillInStackTrace Method ID. I simulate a native call here, because I do not want to mess around with the +java stack at this point*/ + i386_mov_membase_reg(cd, REG_ITMP1_XPTR, OFFSET(java_objectheader, vftbl), REG_ITMP3); + i386_mov_membase_reg(cd, REG_ITMP3, OFFSET(vftbl_t, class), REG_ITMP1); + i386_push_imm(cd, (u4) utf_fillInStackTrace_desc); + i386_push_imm(cd, (u4) utf_fillInStackTrace_name); + i386_push_reg(cd, REG_ITMP1); + i386_mov_imm_reg(cd, (s4) class_resolvemethod, REG_ITMP3); + i386_call_reg(cd, REG_ITMP3); +/*cleanup parameters of class_resolvemethod*/ + i386_alu_imm_reg(cd, I386_ADD,3*4 /*class reference + 2x string reference*/,REG_SP); +/*prepare call to asm_calljavafunction2 */ + i386_push_imm(cd, 0); + i386_push_imm(cd, TYPE_ADR); /* --> call block (TYPE,Exceptionptr), each 8 byte (make this dynamic) (JOWENN)*/ + i386_push_reg(cd, REG_SP); + i386_push_imm(cd, sizeof(jni_callblock)); + i386_push_imm(cd, 1); + i386_push_reg(cd, REG_RESULT); + + i386_mov_imm_reg(cd, (s4) asm_calljavafunction2, REG_ITMP3); + i386_call_reg(cd, REG_ITMP3); + + /* check exceptionptr + fail (JOWENN)*/ + + i386_alu_imm_reg(cd, I386_ADD,6*4,REG_SP); + + i386_pop_reg(cd, REG_ITMP1_XPTR); + i386_pop_reg(cd, REG_ITMP3); /* just remove the no longer needed 0 from the stack*/ + + /*REMOVE_NATIVE_STACKINFO;*/ + i386_mov_imm_reg(cd,(s4)asm_remove_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (s4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); + } + } + + /* generate null pointer check stubs */ + + xcodeptr = NULL; + + for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) { + if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) { + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + xcodeptr - cd->mcodebase - (5 + 5 + 2)); + continue; + } + + gen_resolvebranch(cd->mcodebase + bref->branchpos, + bref->branchpos, + cd->mcodeptr - cd->mcodebase); + + MCODECHECK(100); + + i386_mov_imm_reg(cd, 0, REG_ITMP2_XPC); /* 5 bytes */ + dseg_adddata(cd, cd->mcodeptr); + i386_mov_imm_reg(cd, bref->branchpos - 6, REG_ITMP1); /* 5 bytes */ + i386_alu_reg_reg(cd, I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */ + + if (xcodeptr != NULL) { + i386_jmp_imm(cd, (xcodeptr - cd->mcodeptr) - 5); + + } else { + xcodeptr = cd->mcodeptr; + + i386_push_reg(cd, REG_ITMP2_XPC); + + /*PREPARE_NATIVE_STACKINFO;*/ + i386_push_imm(cd,0); /* the pushed XPC is directly below the java frame*/ + i386_push_imm(cd,0); + i386_mov_imm_reg(cd,(s4)asm_prepare_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + + +#if 0 + /* create native call block*/ + i386_alu_imm_reg(cd, I386_SUB, 3*4, REG_SP); /* build stack frame (4 * 4 bytes) */ + + + i386_mov_imm_reg(cd, (s4) codegen_stubcalled,REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /*call codegen_stubcalled*/ + + i386_mov_imm_reg(cd, (s4) builtin_asm_get_stackframeinfo,REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /*call builtin_asm_get_stackframeinfo*/ + i386_mov_imm_membase(cd, 0,REG_SP, 2*4); /* builtin */ + i386_mov_reg_membase(cd, REG_RESULT,REG_SP,1*4); /* save thread pointer to native call stack*/ + i386_mov_membase_reg(cd, REG_RESULT,0,REG_ITMP2); /* get old value of thread specific native call stack */ + i386_mov_reg_membase(cd, REG_ITMP2,REG_SP,0*4); /* store value on stack */ + i386_mov_reg_membase(cd, REG_SP,REG_RESULT,0); /* store pointer to new stack frame information */ +#endif + + i386_mov_imm_reg(cd, (u4) new_nullpointerexception, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); /* return value is REG_ITMP1_XPTR */ + + /*REMOVE_NATIVE_STACKINFO;*/ + i386_mov_imm_reg(cd,(s4)asm_remove_native_stackinfo,REG_ITMP3); + i386_call_reg(cd,REG_ITMP3); + + +#if 0 + /* restore native call stack */ + i386_mov_membase_reg(cd, REG_SP,0,REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP,4,REG_ITMP3); + i386_mov_reg_membase(cd, REG_ITMP2,REG_ITMP3,0); + i386_alu_imm_reg(cd, I386_ADD,3*4,REG_SP); +#endif + + i386_pop_reg(cd, REG_ITMP2_XPC); + + i386_mov_imm_reg(cd, (s4) asm_handle_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); + } + } + + /* generate put/getstatic stub call code */ + + { + clinitref *cref; + codegendata *tmpcd; + u1 xmcode; + u4 mcode; + + tmpcd = DNEW(codegendata); + + for (cref = cd->clinitrefs; cref != NULL; cref = cref->next) { + /* Get machine code which is patched back in later. A */ + /* `call rel32' is 5 bytes long. */ + xcodeptr = cd->mcodebase + cref->branchpos; + xmcode = *xcodeptr; + mcode = *((u4 *) (xcodeptr + 1)); + + MCODECHECK(50); + + /* patch in `call rel32' to call the following code */ + tmpcd->mcodeptr = xcodeptr; /* set dummy mcode pointer */ + i386_call_imm(tmpcd, cd->mcodeptr - (xcodeptr + 5)); + + /* Save current stack pointer into a temporary register. */ + i386_mov_reg_reg(cd, REG_SP, REG_ITMP1); + + /* Push machine code bytes to patch onto the stack. */ + i386_push_imm(cd, (u4) xmcode); + i386_push_imm(cd, (u4) mcode); + + i386_push_imm(cd, (u4) cref->class); + + /* Push previously saved stack pointer onto stack. */ + i386_push_reg(cd, REG_ITMP1); + + i386_mov_imm_reg(cd, (u4) asm_check_clinit, REG_ITMP1); + i386_jmp_reg(cd, REG_ITMP1); + } + } + } + + codegen_finish(m, cd, (u4) (cd->mcodeptr - cd->mcodebase)); } @@ -4684,20 +4897,33 @@ gen_method: { u1 *createcompilerstub(methodinfo *m) { u1 *s = CNEW(u1, COMPSTUBSIZE); /* memory to hold the stub */ - mcodeptr = s; /* code generation pointer */ + codegendata *cd; + s4 dumpsize; + + /* mark start of dump memory area */ + + dumpsize = dump_size(); + + cd = DNEW(codegendata); + cd->mcodeptr = s; /* code for the stub */ - i386_mov_imm_reg((s4) m, REG_ITMP1);/* pass method pointer to compiler */ + i386_mov_imm_reg(cd, (u4) m, REG_ITMP1);/* pass method pointer to compiler*/ - /* we use EDI cause EDX (REG_ITMP2) is used for patching */ - i386_mov_imm_reg((s4) asm_call_jit_compiler, I386_EDI); /* load address */ - i386_jmp_reg(I386_EDI); /* jump to compiler */ + /* we use REG_ITMP3 cause ECX (REG_ITMP2) is used for patching */ + i386_mov_imm_reg(cd, (u4) asm_call_jit_compiler, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); /* jump to compiler */ -#ifdef STATISTICS - count_cstub_len += COMPSTUBSIZE; +#if defined(STATISTICS) + if (opt_stat) + count_cstub_len += COMPSTUBSIZE; #endif - return (u1*) s; + /* release dump area */ + + dump_release(dumpsize); + + return s; } @@ -4712,103 +4938,203 @@ void removecompilerstub(u1 *stub) CFREE(stub, COMPSTUBSIZE); } + /* function: createnativestub ************************************************** creates a stub routine which calls a native method *******************************************************************************/ -#define NATIVESTUBSIZE 320 +#define NATIVESTUBSIZE 370 + 36 + + +#if defined(USE_THREADS) && defined(NATIVE_THREADS) +static java_objectheader **(*callgetexceptionptrptr)() = builtin_get_exceptionptrptr; +#endif + +void i386_native_stub_debug(void **p) { + printf("Pos on stack: %p\n",p); + printf("Return adress should be: %p\n",*p); +} + +void i386_native_stub_debug2(void **p) { + printf("Pos on stack: %p\n",p); + printf("Return for lookup is: %p\n",*p); +} + +void traverseStackInfo() { + void **p=builtin_asm_get_stackframeinfo(); + + while ((*p)!=0) { + methodinfo *m; + printf("base addr:%p, methodinfo:%p\n",*p,(methodinfo*)((*p)+8)); + m=*((methodinfo**)((*p)+8)); + utf_display(m->name); + printf("\n"); + p=*p; + } + + +} + u1 *createnativestub(functionptr f, methodinfo *m) { u1 *s = CNEW(u1, NATIVESTUBSIZE); /* memory to hold the stub */ + codegendata *cd; + registerdata *rd; + t_inlining_globals *id; + s4 dumpsize; + int addmethod=0; u1 *tptr; int i; - int stackframesize = 4; /* initial 4 bytes is space for jni env */ + int stackframesize = 4+16; /* initial 4 bytes is space for jni env, + + 4 byte thread pointer + 4 byte previous pointer + method info + 4 offset native*/ int stackframeoffset = 4; int p, t; - mcodeptr = (u1*)s; /* make macros work */ + void** callAddrPatchPos=0; + u1* jmpInstrPos=0; + void** jmpInstrPatchPos=0; - if (m->flags & ACC_STATIC) { - stackframesize += 4; - stackframeoffset += 4; - } + /* mark start of dump memory area */ + dumpsize = dump_size(); + + /* allocate required dump memory */ + + cd = DNEW(codegendata); + rd = DNEW(registerdata); + id = DNEW(t_inlining_globals); + + /* setup registers before using it */ + + inlining_setup(m, id); + reg_setup(m, rd, id); + + /* set some required varibles which are normally set by codegen_setup */ + cd->mcodebase = s; + cd->mcodeptr = s; + cd->clinitrefs = NULL; + + if (m->flags & ACC_STATIC) { + stackframesize += 4; + stackframeoffset += 4; + } - reg_init(m); - descriptor2types(m); /* set paramcount and paramtypes */ + +/*DEBUG*/ +/* i386_push_reg(cd, REG_SP); + i386_mov_imm_reg(cd, (s4) i386_native_stub_debug, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_pop_reg(cd, REG_ITMP1);*/ + + + /* if function is static, check for initialized */ + + if (m->flags & ACC_STATIC) { + /* if class isn't yet initialized, do it */ + if (!m->class->initialized) { + s4 *header = (s4 *) s; + *header = 0;/*extablesize*/ + header++; + *header = 0;/*line number table start*/ + header++; + *header = 0;/*line number table size*/ + header++; + *header = 0;/*fltsave*/ + header++; + *header = 0;/*intsave*/ + header++; + *header = 0;/*isleaf*/ + header++; + *header = 0;/*issync*/ + header++; + *header = 0;/*framesize*/ + header++; + *header = (u4) m;/*methodpointer*/ + header++; + + s = (u1 *) header; + + cd->mcodebase = s; + cd->mcodeptr = s; + addmethod = 1; + + codegen_addclinitref(cd, cd->mcodeptr, m->class); + } + } if (runverbose) { - i386_alu_imm_reg(I386_SUB, TRACE_ARGS_NUM * 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_SUB, TRACE_ARGS_NUM * 8 + 4, REG_SP); - for (p = 0; p < m->paramcount; p++) { + for (p = 0; p < m->paramcount && p < TRACE_ARGS_NUM; p++) { t = m->paramtypes[p]; if (IS_INT_LNG_TYPE(t)) { if (IS_2_WORD_TYPE(t)) { - i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); - i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4 + 4, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4 + 4, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, p * 8 + 4); } else if (t == TYPE_ADR) { - i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); - i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); + i386_mov_membase_reg(cd, REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP2, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, p * 8 + 4); } else { - i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1); - i386_cltd(); + i386_mov_membase_reg(cd, REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, EAX); + i386_cltd(cd); + i386_mov_reg_membase(cd, EAX, REG_SP, p * 8); + i386_mov_reg_membase(cd, EDX, REG_SP, p * 8 + 4); } - i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4); } else { - if (t == TYPE_FLT) { - i386_flds_membase(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4); - i386_fstps_membase(REG_SP, p * 8); - i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4); + if (!IS_2_WORD_TYPE(t)) { + i386_flds_membase(cd, REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4); + i386_fstps_membase(cd, REG_SP, p * 8); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP2, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, p * 8 + 4); } else { - i386_fldl_membase(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4); - i386_fstpl_membase(REG_SP, p * 8); + i386_fldl_membase(cd, REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4); + i386_fstpl_membase(cd, REG_SP, p * 8); } } } - - i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1); + i386_alu_reg_reg(cd, I386_XOR, REG_ITMP1, REG_ITMP1); for (p = m->paramcount; p < TRACE_ARGS_NUM; p++) { - i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8); - i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8 + 4); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, p * 8 + 4); } - i386_mov_imm_membase((s4) m, REG_SP, TRACE_ARGS_NUM * 8); + i386_mov_imm_membase(cd, (s4) m, REG_SP, TRACE_ARGS_NUM * 8); - i386_mov_imm_reg((s4) asm_builtin_trace, REG_ITMP1); - i386_call_reg(REG_ITMP1); + i386_mov_imm_reg(cd, (s4) builtin_trace_args, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); - i386_alu_imm_reg(I386_ADD, TRACE_ARGS_NUM * 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_ADD, TRACE_ARGS_NUM * 8 + 4, REG_SP); } /* * mark the whole fpu stack as free for native functions * (only for saved register count == 0) */ - i386_ffree_reg(0); - i386_ffree_reg(1); - i386_ffree_reg(2); - i386_ffree_reg(3); - i386_ffree_reg(4); - i386_ffree_reg(5); - i386_ffree_reg(6); - i386_ffree_reg(7); - - /* - * calculate stackframe size for native function - */ + i386_ffree_reg(cd, 0); + i386_ffree_reg(cd, 1); + i386_ffree_reg(cd, 2); + i386_ffree_reg(cd, 3); + i386_ffree_reg(cd, 4); + i386_ffree_reg(cd, 5); + i386_ffree_reg(cd, 6); + i386_ffree_reg(cd, 7); + + /* calculate stackframe size for native function */ tptr = m->paramtypes; for (i = 0; i < m->paramcount; i++) { switch (*tptr++) { @@ -4828,7 +5154,62 @@ u1 *createnativestub(functionptr f, methodinfo *m) } } - i386_alu_imm_reg(I386_SUB, stackframesize, REG_SP); + i386_alu_imm_reg(cd, I386_SUB, stackframesize, REG_SP); + +/* CREATE DYNAMIC STACK INFO -- BEGIN*/ + i386_mov_imm_membase(cd,0,REG_SP,stackframesize-4); + i386_mov_imm_membase(cd, (s4) m, REG_SP,stackframesize-8); + i386_mov_imm_reg(cd, (s4) builtin_asm_get_stackframeinfo, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); + i386_mov_reg_membase(cd, REG_RESULT,REG_SP,stackframesize-12); /*save thread specific pointer*/ + i386_mov_membase_reg(cd, REG_RESULT,0,REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2,REG_SP,stackframesize-16); /*save previous value of memory adress pointed to by thread specific pointer*/ + i386_mov_reg_reg(cd, REG_SP,REG_ITMP2); + i386_alu_imm_reg(cd, I386_ADD,stackframesize-16,REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP2,REG_RESULT,0); + +/*TESTING ONLY */ +/* i386_mov_imm_membase(cd, (s4) m, REG_SP,stackframesize-4); + i386_mov_imm_membase(cd, (s4) m, REG_SP,stackframesize-8); + i386_mov_imm_membase(cd, (s4) m, REG_SP,stackframesize-12);*/ + +/* CREATE DYNAMIC STACK INFO -- END*/ + +/* RESOLVE NATIVE METHOD -- BEGIN*/ +#ifndef STATIC_CLASSPATH + if (f==0) { + /*log_text("Dynamic classpath: preparing for delayed native function resolving");*/ + i386_jmp_imm(cd,0); + jmpInstrPos=cd->mcodeptr-4; + /*patchposition*/ + i386_mov_imm_reg(cd,jmpInstrPos,REG_ITMP1); + i386_push_reg(cd,REG_ITMP1); + /*jmp offset*/ + i386_mov_imm_reg(cd,0,REG_ITMP1); + jmpInstrPatchPos=cd->mcodeptr-4; + i386_push_reg(cd,REG_ITMP1); + /*position of call address to patch*/ + i386_mov_imm_reg(cd,0,REG_ITMP1); + callAddrPatchPos=(cd->mcodeptr-4); + i386_push_reg(cd,REG_ITMP1); + /*method info structure*/ + i386_mov_imm_reg(cd,(s4) m, REG_ITMP1); + i386_push_reg(cd,REG_ITMP1); + /*call resolve functions*/ + i386_mov_imm_reg(cd, (s4)codegen_resolve_native,REG_ITMP1); + i386_call_reg(cd,REG_ITMP1); + /*cleanup*/ + i386_pop_reg(cd,REG_ITMP1); + i386_pop_reg(cd,REG_ITMP1); + i386_pop_reg(cd,REG_ITMP1); + i386_pop_reg(cd,REG_ITMP1); + /*fix jmp offset replacement*/ + (*jmpInstrPatchPos)=cd->mcodeptr-jmpInstrPos-4; + } /*else log_text("Dynamic classpath: immediate native function resolution possible");*/ +#endif +/* RESOLVE NATIVE METHOD -- END*/ + + tptr = m->paramtypes; for (i = 0; i < m->paramcount; i++) { @@ -4836,17 +5217,17 @@ u1 *createnativestub(functionptr f, methodinfo *m) case TYPE_INT: case TYPE_FLT: case TYPE_ADR: - i386_mov_membase_reg(REG_SP, stackframesize + (1 * 4) + i * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, stackframeoffset); + i386_mov_membase_reg(cd, REG_SP, stackframesize + (1 * 4) + i * 8, REG_ITMP1); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, stackframeoffset); stackframeoffset += 4; break; case TYPE_LNG: case TYPE_DBL: - i386_mov_membase_reg(REG_SP, stackframesize + (1 * 4) + i * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, stackframesize + (1 * 4) + i * 8 + 4, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, stackframeoffset); - i386_mov_reg_membase(REG_ITMP2, REG_SP, stackframeoffset + 4); + i386_mov_membase_reg(cd, REG_SP, stackframesize + (1 * 4) + i * 8, REG_ITMP1); + i386_mov_membase_reg(cd, REG_SP, stackframesize + (1 * 4) + i * 8 + 4, REG_ITMP2); + i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, stackframeoffset); + i386_mov_reg_membase(cd, REG_ITMP2, REG_SP, stackframeoffset + 4); stackframeoffset += 8; break; @@ -4855,1181 +5236,158 @@ u1 *createnativestub(functionptr f, methodinfo *m) } } - i386_mov_imm_membase((s4) &env, REG_SP, 0); - if (m->flags & ACC_STATIC) - i386_mov_imm_membase((s4) m->class, REG_SP,4); + if (m->flags & ACC_STATIC) { + /* put class into second argument */ + i386_mov_imm_membase(cd, (s4) m->class, REG_SP, 4); + } + + /* put env into first argument */ + i386_mov_imm_membase(cd, (s4) &env, REG_SP, 0); + + i386_mov_imm_reg(cd, (s4) f, REG_ITMP1); +#ifndef STATIC_CLASSPATH + if (f==0) + (*callAddrPatchPos)=(cd->mcodeptr-4); +#endif + i386_call_reg(cd, REG_ITMP1); + +/*REMOVE DYNAMIC STACK INFO -BEGIN */ + i386_push_reg(cd, REG_RESULT2); + i386_mov_membase_reg(cd, REG_SP,stackframesize-12,REG_ITMP2); /*old value*/ + i386_mov_membase_reg(cd, REG_SP,stackframesize-8,REG_RESULT2); /*pointer*/ + i386_mov_reg_membase(cd, REG_ITMP2,REG_RESULT2,0); + i386_pop_reg(cd, REG_RESULT2); +/*REMOVE DYNAMIC STACK INFO -END */ + + i386_alu_imm_reg(cd, I386_ADD, stackframesize, REG_SP); - i386_mov_imm_reg((s4) f, REG_ITMP1); - i386_call_reg(REG_ITMP1); - i386_alu_imm_reg(I386_ADD, stackframesize, REG_SP); if (runverbose) { - i386_alu_imm_reg(I386_SUB, 4 + 8 + 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_SUB, 4 + 8 + 8 + 4, REG_SP); - i386_mov_imm_membase((s4) m, REG_SP, 0); + i386_mov_imm_membase(cd, (u4) m, REG_SP, 0); - i386_mov_reg_membase(REG_RESULT, REG_SP, 4); - i386_mov_reg_membase(REG_RESULT2, REG_SP, 4 + 4); + i386_mov_reg_membase(cd, REG_RESULT, REG_SP, 4); + i386_mov_reg_membase(cd, REG_RESULT2, REG_SP, 4 + 4); - i386_fstl_membase(REG_SP, 4 + 8); - i386_fsts_membase(REG_SP, 4 + 8 + 8); - - i386_mov_imm_reg((s4) asm_builtin_exittrace, REG_ITMP1); - i386_call_reg(REG_ITMP1); + i386_fstl_membase(cd, REG_SP, 4 + 8); + i386_fsts_membase(cd, REG_SP, 4 + 8 + 8); + + i386_mov_imm_reg(cd, (u4) builtin_displaymethodstop, REG_ITMP1); + i386_call_reg(cd, REG_ITMP1); - i386_mov_membase_reg(REG_SP, 4, REG_RESULT); - i386_mov_membase_reg(REG_SP, 4 + 4, REG_RESULT2); + i386_mov_membase_reg(cd, REG_SP, 4, REG_RESULT); + i386_mov_membase_reg(cd, REG_SP, 4 + 4, REG_RESULT2); - i386_alu_imm_reg(I386_ADD, 4 + 8 + 8 + 4, REG_SP); + i386_alu_imm_reg(cd, I386_ADD, 4 + 8 + 8 + 4, REG_SP); } - /* we can use EDI cause it's not preserved across function calls */ - i386_mov_imm_reg((s4) &exceptionptr, I386_EDI); - i386_mov_membase_reg(I386_EDI, 0, I386_EDI); - i386_test_reg_reg(I386_EDI, I386_EDI); - i386_jcc(I386_CC_NE, 1); - - i386_ret(); - - i386_mov_reg_reg(I386_EDI, REG_ITMP1_XPTR); - i386_mov_imm_reg((s4) &exceptionptr, I386_EDI); - i386_mov_imm_membase(0, I386_EDI, 0); - i386_mov_membase_reg(REG_SP, 0, REG_ITMP2_XPC); - i386_alu_imm_reg(I386_SUB, 2, REG_ITMP2_XPC); - - i386_mov_imm_reg((s4) asm_handle_nat_exception, I386_EDI); - i386_jmp_reg(I386_EDI); - -#ifdef STATISTICS - count_nstub_len += NATIVESTUBSIZE; + /* we can't use REG_ITMP3 == REG_RESULT2 */ +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + i386_push_reg(cd, REG_RESULT); + i386_push_reg(cd, REG_RESULT2); + i386_call_mem(cd, (s4) &callgetexceptionptrptr); + i386_mov_membase_reg(cd, REG_RESULT, 0, REG_ITMP2); + i386_test_reg_reg(cd, REG_ITMP2, REG_ITMP2); + i386_pop_reg(cd, REG_RESULT2); + i386_pop_reg(cd, REG_RESULT); +#else + i386_mov_imm_reg(cd, (s4) &_exceptionptr, REG_ITMP2); + i386_mov_membase_reg(cd, REG_ITMP2, 0, REG_ITMP2); + i386_test_reg_reg(cd, REG_ITMP2, REG_ITMP2); #endif + i386_jcc(cd, I386_CC_NE, 1); - return s; -} - -/* function: removenativestub ************************************************** - - removes a previously created native-stub from memory - -*******************************************************************************/ - -void removenativestub(u1 *stub) -{ - CFREE(stub, NATIVESTUBSIZE); -} - - + i386_ret(cd); -void i386_emit_ialu(s4 alu_op, stackptr src, instruction *iptr) -{ - if (iptr->dst->flags & INMEMORY) { - if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - if (src->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - - } else if (src->prev->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - - } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - if (src->regoff == iptr->dst->regoff) { - i386_alu_reg_membase(alu_op, src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - - } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_reg_reg(alu_op, src->prev->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - if (src->prev->regoff == iptr->dst->regoff) { - i386_alu_reg_membase(alu_op, src->regoff, REG_SP, iptr->dst->regoff * 8); - - } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_alu_reg_reg(alu_op, src->regoff, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else { - i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(alu_op, src->regoff, REG_SP, iptr->dst->regoff * 8); - } - - } else { - if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff); - i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, iptr->dst->regoff); - - } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, iptr->dst->regoff); - - } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_alu_membase_reg(alu_op, REG_SP, src->prev->regoff * 8, iptr->dst->regoff); +#if defined(USE_THREADS) && defined(NATIVE_THREADS) + i386_push_reg(cd, REG_ITMP2); + i386_call_mem(cd, (s4) &callgetexceptionptrptr); + i386_mov_imm_membase(cd, 0, REG_RESULT, 0); + i386_pop_reg(cd, REG_ITMP1_XPTR); +#else + i386_mov_reg_reg(cd, REG_ITMP2, REG_ITMP1_XPTR); + i386_mov_imm_reg(cd, (s4) &_exceptionptr, REG_ITMP2); + i386_mov_imm_membase(cd, 0, REG_ITMP2, 0); +#endif + i386_mov_membase_reg(cd, REG_SP, 0, REG_ITMP2_XPC); + i386_alu_imm_reg(cd, I386_SUB, 2, REG_ITMP2_XPC); - } else { - if (src->regoff == iptr->dst->regoff) { - i386_alu_reg_reg(alu_op, src->prev->regoff, iptr->dst->regoff); + i386_mov_imm_reg(cd, (s4) asm_handle_nat_exception, REG_ITMP3); + i386_jmp_reg(cd, REG_ITMP3); - } else { - M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - i386_alu_reg_reg(alu_op, src->regoff, iptr->dst->regoff); - } - } + if (addmethod) { + codegen_insertmethod(s, cd->mcodeptr); } -} - - - -void i386_emit_ialuconst(s4 alu_op, stackptr src, instruction *iptr) -{ - if (iptr->dst->flags & INMEMORY) { - if (src->flags & INMEMORY) { - if (src->regoff == iptr->dst->regoff) { - i386_alu_imm_membase(alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8); - - } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_imm_reg(alu_op, iptr->val.i, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else { - i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8); - i386_alu_imm_membase(alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8); - } - } else { - if (src->flags & INMEMORY) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); - i386_alu_imm_reg(alu_op, iptr->val.i, iptr->dst->regoff); + { + u1 *xcodeptr; + clinitref *cref; + codegendata *tmpcd; + u1 xmcode; + u4 mcode; - } else { - M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_alu_imm_reg(alu_op, iptr->val.i, iptr->dst->regoff); - } - } -} + tmpcd = DNEW(codegendata); + /* there can only be one clinit ref entry */ + cref = cd->clinitrefs; + if (cref) { + /* Get machine code which is patched back in later. A */ + /* `call rel32' is 5 bytes long. */ + xcodeptr = cd->mcodebase + cref->branchpos; + xmcode = *xcodeptr; + mcode = *((u4 *) (xcodeptr + 1)); -void i386_emit_lalu(s4 alu_op, stackptr src, instruction *iptr) -{ - if (iptr->dst->flags & INMEMORY) { - if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - if (src->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(alu_op, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); - - } else if (src->prev->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_alu_reg_membase(alu_op, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); + /* patch in `call rel32' to call the following code */ + tmpcd->mcodeptr = xcodeptr; /* set dummy mcode pointer */ + i386_call_imm(tmpcd, cd->mcodeptr - (xcodeptr + 5)); - } else { - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); - i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, REG_ITMP1); - i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); - } - } - } -} + /* Save current stack pointer into a temporary register. */ + i386_mov_reg_reg(cd, REG_SP, REG_ITMP1); + /* Push machine code bytes to patch onto the stack. */ + i386_push_imm(cd, (u4) xmcode); + i386_push_imm(cd, (u4) mcode); + i386_push_imm(cd, (u4) cref->class); -void i386_emit_laluconst(s4 alu_op, stackptr src, instruction *iptr) -{ - if (iptr->dst->flags & INMEMORY) { - if (src->flags & INMEMORY) { - if (src->regoff == iptr->dst->regoff) { - i386_alu_imm_membase(alu_op, iptr->val.l, REG_SP, iptr->dst->regoff * 8); - i386_alu_imm_membase(alu_op, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4); + /* Push previously saved stack pointer onto stack. */ + i386_push_reg(cd, REG_ITMP1); - } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); - i386_alu_imm_reg(alu_op, iptr->val.l, REG_ITMP1); - i386_alu_imm_reg(alu_op, iptr->val.l >> 32, REG_ITMP2); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); - } + i386_mov_imm_reg(cd, (u4) asm_check_clinit, REG_ITMP1); + i386_jmp_reg(cd, REG_ITMP1); } } -} - - - -void i386_emit_ishift(s4 shift_op, stackptr src, instruction *iptr) -{ - if (iptr->dst->flags & INMEMORY) { - if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - if (src->prev->regoff == iptr->dst->regoff) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); - i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8); - - } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_shift_reg(shift_op, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); - i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8); - - } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - if (src->prev->regoff == iptr->dst->regoff) { - M_INTMOVE(src->regoff, I386_ECX); - i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8); - } else { - M_INTMOVE(src->regoff, I386_ECX); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); - i386_shift_reg(shift_op, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else { - M_INTMOVE(src->regoff, I386_ECX); - i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8); - i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8); - } +#if 0 + dolog_plain("native stubentry: %p, stubsize: %d (for %d params) --", (s4)s,(s4) (cd->mcodeptr - s), m->paramcount); + utf_display(m->name); + dolog_plain("\n"); +#endif - } else { - if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff); - i386_shift_reg(shift_op, iptr->dst->regoff); +#if defined(STATISTICS) + if (opt_stat) + count_nstub_len += NATIVESTUBSIZE; +#endif - } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); - M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - i386_shift_reg(shift_op, iptr->dst->regoff); + /* release dump area */ - } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) { - M_INTMOVE(src->regoff, I386_ECX); - i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff); - i386_shift_reg(shift_op, iptr->dst->regoff); + dump_release(dumpsize); - } else { - M_INTMOVE(src->regoff, I386_ECX); - M_INTMOVE(src->prev->regoff, iptr->dst->regoff); - i386_shift_reg(shift_op, iptr->dst->regoff); - } - } + return s; } +/* function: removenativestub ************************************************** -void i386_emit_ishiftconst(s4 shift_op, stackptr src, instruction *iptr) -{ - if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) { - if (src->regoff == iptr->dst->regoff) { - i386_shift_imm_membase(shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8); - - } else { - i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); - i386_shift_imm_reg(shift_op, iptr->val.i, REG_ITMP1); - i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); - } - - } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) { - i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff); - i386_shift_imm_reg(shift_op, iptr->val.i, iptr->dst->regoff); - - } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) { - i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8); - i386_shift_imm_membase(shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8); - - } else { - M_INTMOVE(src->regoff, iptr->dst->regoff); - i386_shift_imm_reg(shift_op, iptr->val.i, iptr->dst->regoff); - } -} - - + removes a previously created native-stub from memory + +*******************************************************************************/ -void i386_emit_ifcc_iconst(s4 if_op, stackptr src, instruction *iptr) +void removenativestub(u1 *stub) { - if (iptr->dst->flags & INMEMORY) { - int offset = 0; - - if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); - - } else { - i386_test_reg_reg(src->regoff, src->regoff); - } - - offset += 7; - CALCOFFSETBYTES(offset, iptr->dst->regoff * 8); - - i386_jcc(if_op, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0); - i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8); - - if ((iptr[1].opc == ICMD_ELSE_ICONST)) { - i386_jmp_imm(offset); - i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8); - } - - } else { - if (src->flags & INMEMORY) { - i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); - - } else { - i386_test_reg_reg(src->regoff, src->regoff); - } - - i386_jcc(if_op, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5); - i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff); - - if ((iptr[1].opc == ICMD_ELSE_ICONST)) { - i386_jmp_imm(5); - i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff); - } - } -} - - - -/* - * mov ops - */ -void i386_mov_reg_reg(s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x89; - i386_emit_reg((reg),(dreg)); -} - - -void i386_mov_imm_reg(s4 imm, s4 reg) { - *(mcodeptr++) = (u1) 0xb8 + ((reg) & 0x07); - i386_emit_imm32((imm)); -} - - -void i386_movb_imm_reg(s4 imm, s4 reg) { - *(mcodeptr++) = (u1) 0xc6; - i386_emit_reg(0,(reg)); - i386_emit_imm8((imm)); -} - - -void i386_mov_membase_reg(s4 basereg, s4 disp, s4 reg) { - *(mcodeptr++) = (u1) 0x8b; - i386_emit_membase((basereg),(disp),(reg)); -} - - -/* - * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a - * constant membase immediate length of 32bit - */ -void i386_mov_membase32_reg(s4 basereg, s4 disp, s4 reg) { - *(mcodeptr++) = (u1) 0x8b; - i386_address_byte(2, (reg), (basereg)); - i386_emit_imm32((disp)); -} - - -void i386_mov_reg_membase(s4 reg, s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0x89; - i386_emit_membase((basereg),(disp),(reg)); -} - - -void i386_mov_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) { - *(mcodeptr++) = (u1) 0x8b; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - -void i386_mov_reg_memindex(s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0x89; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - -void i386_movw_reg_memindex(s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0x66; - *(mcodeptr++) = (u1) 0x89; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - -void i386_movb_reg_memindex(s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0x88; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - -void i386_mov_imm_membase(s4 imm, s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xc7; - i386_emit_membase((basereg),(disp),0); - i386_emit_imm32((imm)); -} - - -void i386_movsbl_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xbe; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - -void i386_movswl_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xbf; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - -void i386_movzwl_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xb7; - i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale)); -} - - - -/* - * alu operations - */ -void i386_alu_reg_reg(s4 opc, s4 reg, s4 dreg) { - *(mcodeptr++) = (((u1) (opc)) << 3) + 1; - i386_emit_reg((reg),(dreg)); -} - - -void i386_alu_reg_membase(s4 opc, s4 reg, s4 basereg, s4 disp) { - *(mcodeptr++) = (((u1) (opc)) << 3) + 1; - i386_emit_membase((basereg),(disp),(reg)); -} - - -void i386_alu_membase_reg(s4 opc, s4 basereg, s4 disp, s4 reg) { - *(mcodeptr++) = (((u1) (opc)) << 3) + 3; - i386_emit_membase((basereg),(disp),(reg)); -} - - -void i386_alu_imm_reg(s4 opc, s4 imm, s4 dreg) { - if (i386_is_imm8(imm)) { - *(mcodeptr++) = (u1) 0x83; - i386_emit_reg((opc),(dreg)); - i386_emit_imm8((imm)); - } else { - *(mcodeptr++) = (u1) 0x81; - i386_emit_reg((opc),(dreg)); - i386_emit_imm32((imm)); - } -} - - -void i386_alu_imm_membase(s4 opc, s4 imm, s4 basereg, s4 disp) { - if (i386_is_imm8(imm)) { - *(mcodeptr++) = (u1) 0x83; - i386_emit_membase((basereg),(disp),(opc)); - i386_emit_imm8((imm)); - } else { - *(mcodeptr++) = (u1) 0x81; - i386_emit_membase((basereg),(disp),(opc)); - i386_emit_imm32((imm)); - } -} - - -void i386_test_reg_reg(s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x85; - i386_emit_reg((reg),(dreg)); -} - - -void i386_test_imm_reg(s4 imm, s4 reg) { - *(mcodeptr++) = (u1) 0xf7; - i386_emit_reg(0,(reg)); - i386_emit_imm32((imm)); -} - - - -/* - * inc, dec operations - */ -void i386_inc_reg(s4 reg) { - *(mcodeptr++) = (u1) 0x40 + ((reg) & 0x07); -} - - -void i386_inc_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xff; - i386_emit_membase((basereg),(disp),0); -} - - -void i386_dec_reg(s4 reg) { - *(mcodeptr++) = (u1) 0x48 + ((reg) & 0x07); -} - - -void i386_dec_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xff; - i386_emit_membase((basereg),(disp),1); -} - - - -void i386_cltd() { - *(mcodeptr++) = (u1) 0x99; -} - - - -void i386_imul_reg_reg(s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xaf; - i386_emit_reg((dreg),(reg)); -} - - -void i386_imul_membase_reg(s4 basereg, s4 disp, s4 dreg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xaf; - i386_emit_membase((basereg),(disp),(dreg)); -} - - -void i386_imul_imm_reg(s4 imm, s4 dreg) { - if (i386_is_imm8((imm))) { - *(mcodeptr++) = (u1) 0x6b; - i386_emit_reg(0,(dreg)); - i386_emit_imm8((imm)); - } else { - *(mcodeptr++) = (u1) 0x69; - i386_emit_reg(0,(dreg)); - i386_emit_imm32((imm)); - } -} - - -void i386_imul_imm_reg_reg(s4 imm, s4 reg, s4 dreg) { - if (i386_is_imm8((imm))) { - *(mcodeptr++) = (u1) 0x6b; - i386_emit_reg((dreg),(reg)); - i386_emit_imm8((imm)); - } else { - *(mcodeptr++) = (u1) 0x69; - i386_emit_reg((dreg),(reg)); - i386_emit_imm32((imm)); - } -} - - -void i386_imul_imm_membase_reg(s4 imm, s4 basereg, s4 disp, s4 dreg) { - if (i386_is_imm8((imm))) { - *(mcodeptr++) = (u1) 0x6b; - i386_emit_membase((basereg),(disp),(dreg)); - i386_emit_imm8((imm)); - } else { - *(mcodeptr++) = (u1) 0x69; - i386_emit_membase((basereg),(disp),(dreg)); - i386_emit_imm32((imm)); - } -} - - -void i386_mul_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xf7; - i386_emit_membase((basereg),(disp),4); -} - - -void i386_idiv_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xf7; - i386_emit_reg(7,(reg)); -} - - - -void i386_ret() { - *(mcodeptr++) = (u1) 0xc3; -} - - - -/* - * shift ops - */ -void i386_shift_reg(s4 opc, s4 reg) { - *(mcodeptr++) = (u1) 0xd3; - i386_emit_reg((opc),(reg)); -} - - -void i386_shift_membase(s4 opc, s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd3; - i386_emit_membase((basereg),(disp),(opc)); -} - - -void i386_shift_imm_reg(s4 opc, s4 imm, s4 dreg) { - if ((imm) == 1) { - *(mcodeptr++) = (u1) 0xd1; - i386_emit_reg((opc),(dreg)); - } else { - *(mcodeptr++) = (u1) 0xc1; - i386_emit_reg((opc),(dreg)); - i386_emit_imm8((imm)); - } -} - - -void i386_shift_imm_membase(s4 opc, s4 imm, s4 basereg, s4 disp) { - if ((imm) == 1) { - *(mcodeptr++) = (u1) 0xd1; - i386_emit_membase((basereg),(disp),(opc)); - } else { - *(mcodeptr++) = (u1) 0xc1; - i386_emit_membase((basereg),(disp),(opc)); - i386_emit_imm8((imm)); - } -} - - -void i386_shld_reg_reg(s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xa5; - i386_emit_reg((reg),(dreg)); -} - - -void i386_shld_imm_reg_reg(s4 imm, s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xa4; - i386_emit_reg((reg),(dreg)); - i386_emit_imm8((imm)); -} - - -void i386_shld_reg_membase(s4 reg, s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xa5; - i386_emit_membase((basereg),(disp),(reg)); -} - - -void i386_shrd_reg_reg(s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xad; - i386_emit_reg((reg),(dreg)); -} - - -void i386_shrd_imm_reg_reg(s4 imm, s4 reg, s4 dreg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xac; - i386_emit_reg((reg),(dreg)); - i386_emit_imm8((imm)); -} - - -void i386_shrd_reg_membase(s4 reg, s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) 0xad; - i386_emit_membase((basereg),(disp),(reg)); -} - - - -/* - * jump operations - */ -void i386_jmp_imm(s4 imm) { - *(mcodeptr++) = (u1) 0xe9; - i386_emit_imm32((imm)); -} - - -void i386_jmp_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xff; - i386_emit_reg(4,(reg)); -} - - -void i386_jcc(s4 opc, s4 imm) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) (0x80 + (opc)); - i386_emit_imm32((imm)); -} - - - -/* - * conditional set operations - */ -void i386_setcc_reg(s4 opc, s4 reg) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) (0x90 + (opc)); - i386_emit_reg(0,(reg)); -} - - -void i386_setcc_membase(s4 opc, s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0x0f; - *(mcodeptr++) = (u1) (0x90 + (opc)); - i386_emit_membase((basereg),(disp),0); -} - - - -void i386_neg_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xf7; - i386_emit_reg(3,(reg)); -} - - -void i386_neg_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xf7; - i386_emit_membase((basereg),(disp),3); -} - - - -void i386_push_imm(s4 imm) { - *(mcodeptr++) = (u1) 0x68; - i386_emit_imm32((imm)); -} - - -void i386_pop_reg(s4 reg) { - *(mcodeptr++) = (u1) 0x58 + (0x07 & (reg)); -} - - -void i386_nop() { - *(mcodeptr++) = (u1) 0x90; -} - - -/* - * call instructions - */ -void i386_call_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xff; - i386_emit_reg(2,(reg)); -} - - -void i386_call_imm(s4 imm) { - *(mcodeptr++) = (u1) 0xe8; - i386_emit_imm32((imm)); -} - - - -/* - * floating point instructions - */ -void i386_fld1() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xe8; -} - - -void i386_fldz() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xee; -} - - -void i386_fld_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xc0 + (0x07 & (reg)); -} - - -void i386_flds_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_membase((basereg),(disp),0); -} - - -void i386_fldl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdd; - i386_emit_membase((basereg),(disp),0); -} - - -void i386_fldt_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdb; - i386_emit_membase((basereg),(disp),5); -} - - -void i386_flds_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_memindex(0,(disp),(basereg),(indexreg),(scale)); -} - - -void i386_fldl_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0xdd; - i386_emit_memindex(0,(disp),(basereg),(indexreg),(scale)); -} - - - - -void i386_fildl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdb; - i386_emit_membase((basereg),(disp),0); -} - - -void i386_fildll_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdf; - i386_emit_membase((basereg),(disp),5); -} - - - - -void i386_fst_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdd; - *(mcodeptr++) = (u1) 0xd0 + (0x07 & (reg)); -} - - -void i386_fsts_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_membase((basereg),(disp),2); -} - - -void i386_fstl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdd; - i386_emit_membase((basereg),(disp),2); -} - - -void i386_fsts_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_memindex(2,(disp),(basereg),(indexreg),(scale)); -} - - -void i386_fstl_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0xdd; - i386_emit_memindex(2,(disp),(basereg),(indexreg),(scale)); -} - - -void i386_fstp_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdd; - *(mcodeptr++) = (u1) 0xd8 + (0x07 & (reg)); -} - - -void i386_fstps_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_membase((basereg),(disp),3); -} - - -void i386_fstpl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdd; - i386_emit_membase((basereg),(disp),3); -} - - -void i386_fstpt_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdb; - i386_emit_membase((basereg),(disp),7); -} - - -void i386_fstps_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_memindex(3,(disp),(basereg),(indexreg),(scale)); -} - - -void i386_fstpl_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) { - *(mcodeptr++) = (u1) 0xdd; - i386_emit_memindex(3,(disp),(basereg),(indexreg),(scale)); -} - - -void i386_fistl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdb; - i386_emit_membase((basereg),(disp),2); -} - - -void i386_fistpl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdb; - i386_emit_membase((basereg),(disp),3); -} - - -void i386_fistpll_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdf; - i386_emit_membase((basereg),(disp),7); -} - - -void i386_fchs() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xe0; -} - - -void i386_faddp() { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xc1; -} - - -void i386_fadd_reg_st(s4 reg) { - *(mcodeptr++) = (u1) 0xd8; - *(mcodeptr++) = (u1) 0xc0 + (0x0f & (reg)); -} - - -void i386_fadd_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdc; - *(mcodeptr++) = (u1) 0xc0 + (0x0f & (reg)); -} - - -void i386_faddp_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xc0 + (0x0f & (reg)); -} - - -void i386_fadds_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd8; - i386_emit_membase((basereg),(disp),0); -} - - -void i386_faddl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdc; - i386_emit_membase((basereg),(disp),0); -} - - -void i386_fsub_reg_st(s4 reg) { - *(mcodeptr++) = (u1) 0xd8; - *(mcodeptr++) = (u1) 0xe0 + (0x07 & (reg)); -} - - -void i386_fsub_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdc; - *(mcodeptr++) = (u1) 0xe8 + (0x07 & (reg)); -} - - -void i386_fsubp_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xe8 + (0x07 & (reg)); -} - - -void i386_fsubp() { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xe9; -} - - -void i386_fsubs_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd8; - i386_emit_membase((basereg),(disp),4); -} - - -void i386_fsubl_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdc; - i386_emit_membase((basereg),(disp),4); -} - - -void i386_fmul_reg_st(s4 reg) { - *(mcodeptr++) = (u1) 0xd8; - *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg)); -} - - -void i386_fmul_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdc; - *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg)); -} - - -void i386_fmulp() { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xc9; -} - - -void i386_fmulp_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg)); -} - - -void i386_fmuls_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd8; - i386_emit_membase((basereg),(disp),1); -} - - -void i386_fmull_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xdc; - i386_emit_membase((basereg),(disp),1); -} - - -void i386_fdiv_reg_st(s4 reg) { - *(mcodeptr++) = (u1) 0xd8; - *(mcodeptr++) = (u1) 0xf0 + (0x07 & (reg)); -} - - -void i386_fdiv_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdc; - *(mcodeptr++) = (u1) 0xf8 + (0x07 & (reg)); -} - - -void i386_fdivp() { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xf9; -} - - -void i386_fdivp_st_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xde; - *(mcodeptr++) = (u1) 0xf8 + (0x07 & (reg)); -} - - -void i386_fxch() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xc9; -} - - -void i386_fxch_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg)); -} - - -void i386_fprem() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xf8; -} - - -void i386_fprem1() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xf5; -} - - -void i386_fucom() { - *(mcodeptr++) = (u1) 0xdd; - *(mcodeptr++) = (u1) 0xe1; -} - - -void i386_fucom_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdd; - *(mcodeptr++) = (u1) 0xe0 + (0x07 & (reg)); -} - - -void i386_fucomp_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdd; - *(mcodeptr++) = (u1) 0xe8 + (0x07 & (reg)); -} - - -void i386_fucompp() { - *(mcodeptr++) = (u1) 0xda; - *(mcodeptr++) = (u1) 0xe9; -} - - -void i386_fnstsw() { - *(mcodeptr++) = (u1) 0xdf; - *(mcodeptr++) = (u1) 0xe0; -} - - -void i386_sahf() { - *(mcodeptr++) = (u1) 0x9e; -} - - -void i386_finit() { - *(mcodeptr++) = (u1) 0x9b; - *(mcodeptr++) = (u1) 0xdb; - *(mcodeptr++) = (u1) 0xe3; -} - - -void i386_fldcw_mem(s4 mem) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_mem(5,(mem)); -} - - -void i386_fldcw_membase(s4 basereg, s4 disp) { - *(mcodeptr++) = (u1) 0xd9; - i386_emit_membase((basereg),(disp),5); -} - - -void i386_wait() { - *(mcodeptr++) = (u1) 0x9b; -} - - -void i386_ffree_reg(s4 reg) { - *(mcodeptr++) = (u1) 0xdd; - *(mcodeptr++) = (u1) 0xc0 + (0x07 & (reg)); -} - - -void i386_fdecstp() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xf6; -} - - -void i386_fincstp() { - *(mcodeptr++) = (u1) 0xd9; - *(mcodeptr++) = (u1) 0xf7; + CFREE(stub, NATIVESTUBSIZE); }