X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsystem.c;h=898c3ccc9f6c86b52af3ea6b11455e533a872254;hb=refs%2Fheads%2Fcoreboot;hp=29f00527c486d97dc92a7c88f4182724044b6627;hpb=95b2f78f97a83787c5f669f349b0ea4f682d2674;p=seabios.git diff --git a/src/system.c b/src/system.c index 29f0052..898c3cc 100644 --- a/src/system.c +++ b/src/system.c @@ -1,14 +1,16 @@ -// 16bit system callbacks +// Handler for int 0x15 "system" calls // // Copyright (C) 2008 Kevin O'Connor // Copyright (C) 2002 MandrakeSoft S.A. // -// This file may be distributed under the terms of the GNU GPLv3 license. +// This file may be distributed under the terms of the GNU LGPLv3 license. -#include "util.h" // irq_restore -#include "biosvar.h" // CONFIG_BIOS_TABLE +#include "util.h" // memcpy_far +#include "biosvar.h" // BIOS_CONFIG_TABLE #include "ioport.h" // inb -#include "cmos.h" // inb_cmos +#include "memmap.h" // E820_RAM +#include "pic.h" // eoi_pic2 +#include "bregs.h" // struct bregs // Use PS2 System Control port A to set A20 enable static inline u8 @@ -17,46 +19,46 @@ set_a20(u8 cond) // get current setting first u8 newval, oldval = inb(PORT_A20); if (cond) - newval = oldval | 0x02; + newval = oldval | A20_ENABLE_BIT; else - newval = oldval & ~0x02; + newval = oldval & ~A20_ENABLE_BIT; outb(newval, PORT_A20); - return (newval & 0x02) != 0; + return (oldval & A20_ENABLE_BIT) != 0; } static void handle_152400(struct bregs *regs) { set_a20(0); - handle_ret(regs, 0); + set_code_success(regs); } static void handle_152401(struct bregs *regs) { set_a20(1); - handle_ret(regs, 0); + set_code_success(regs); } static void handle_152402(struct bregs *regs) { - regs->al = !!(inb(PORT_A20) & 0x20); - handle_ret(regs, 0); + regs->al = (inb(PORT_A20) & A20_ENABLE_BIT) != 0; + set_code_success(regs); } static void handle_152403(struct bregs *regs) { regs->bx = 3; - handle_ret(regs, 0); + set_code_success(regs); } static void handle_1524XX(struct bregs *regs) { - handle_ret(regs, RET_EUNSUPPORTED); + set_code_unimplemented(regs, RET_EUNSUPPORTED); } static void @@ -75,29 +77,7 @@ handle_1524(struct bregs *regs) static void handle_1552(struct bregs *regs) { - handle_ret(regs, 0); -} - -// Sleep for n microseconds. currently using the -// refresh request port 0x61 bit4, toggling every 15usec -static void -usleep(u32 count) -{ - count = count / 15; - u8 kbd = inb(PORT_PS2_CTRLB); - while (count) - if ((inb(PORT_PS2_CTRLB) ^ kbd) & KBD_REFRESH) - count--; -} - -// Wait for CX:DX microseconds. currently using the -// refresh request port 0x61 bit4, toggling every 15usec -static void -handle_1586(struct bregs *regs) -{ - irq_enable(); - usleep((regs->cx << 16) | regs->dx); - irq_disable(); + set_code_success(regs); } static void @@ -121,102 +101,129 @@ handle_1587(struct bregs *regs) // 20..27 CS zeros filled in by BIOS // 28..2f SS zeros filled in by BIOS - //es:si - //eeee0 - //0ssss - //----- - // check for access rights of source & dest here // Initialize GDT descriptor - u16 si = regs->si; - u16 base15_00 = (regs->es << 4) + si; - u16 base23_16 = regs->es >> 12; - if (base15_00 < (regs->es<<4)) - base23_16++; - SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor - SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00 - SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16 - SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access - SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16 - + u32 si = regs->si; + u64 *gdt_far = (void*)si; + u16 gdt_seg = regs->es; + u32 loc = (u32)MAKE_FLATPTR(gdt_seg, gdt_far); + SET_FARVAR(gdt_seg, gdt_far[1], GDT_DATA | GDT_LIMIT((6*sizeof(u64))-1) + | GDT_BASE(loc)); // Initialize CS descriptor - SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit - SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00 - SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16 - SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access - SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16 - + SET_FARVAR(gdt_seg, gdt_far[4], GDT_CODE | GDT_LIMIT(BUILD_BIOS_SIZE-1) + | GDT_BASE(BUILD_BIOS_ADDR)); // Initialize SS descriptor - u16 ss = GET_SEG(SS); - base15_00 = ss << 4; - base23_16 = ss >> 12; - SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit - SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00 - SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16 - SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access - SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16 + loc = (u32)MAKE_FLATPTR(GET_SEG(SS), 0); + SET_FARVAR(gdt_seg, gdt_far[5], GDT_DATA | GDT_LIMIT(0x0ffff) + | GDT_BASE(loc)); + u16 count = regs->cx; asm volatile( // Load new descriptor tables - "lgdt %%es:(%1)\n" - "lidt %%cs:pmode_IDT_info\n" + " lgdtw %%es:(1<<3)(%%si)\n" + " lidtw %%cs:pmode_IDT_info\n" - // set PE bit in CR0 - "movl %%cr0, %%eax\n" - "orb $0x01, %%al\n" - "movl %%eax, %%cr0\n" + // Enable protected mode + " movl %%cr0, %%eax\n" + " orl $" __stringify(CR0_PE) ", %%eax\n" + " movl %%eax, %%cr0\n" // far jump to flush CPU queue after transition to protected mode - "ljmpw $0x0020, $1f\n" - "1:\n" + " ljmpw $(4<<3), $1f\n" // GDT points to valid descriptor table, now load DS, ES - "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00 - "movw %%ax, %%ds\n" - "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00 - "movw %%ax, %%es\n" + "1:movw $(2<<3), %%ax\n" // 2nd descriptor in table, TI=GDT, RPL=00 + " movw %%ax, %%ds\n" + " movw $(3<<3), %%ax\n" // 3rd descriptor in table, TI=GDT, RPL=00 + " movw %%ax, %%es\n" // move CX words from DS:SI to ES:DI - "xorw %%si, %%si\n" - "xorw %%di, %%di\n" - "cld\n" - "rep movsw\n" + " xorw %%si, %%si\n" + " xorw %%di, %%di\n" + " rep movsw\n" + + // Restore DS and ES segment limits to 0xffff + " movw $(5<<3), %%ax\n" // 5th descriptor in table (SS) + " movw %%ax, %%ds\n" + " movw %%ax, %%es\n" - // reset PG bit in CR0 ??? - "movl %%cr0, %%eax\n" - "andb $0xfe, %%al\n" - "movl %%eax, %%cr0\n" + // Disable protected mode + " movl %%cr0, %%eax\n" + " andl $~" __stringify(CR0_PE) ", %%eax\n" + " movl %%eax, %%cr0\n" // far jump to flush CPU queue after transition to real mode - "ljmpw $0xf000, $2f\n" - "2:\n" + " ljmpw $" __stringify(SEG_BIOS) ", $2f\n" // restore IDT to normal real-mode defaults - "lidt %%cs:rmode_IDT_info\n" + "2:lidtw %%cs:rmode_IDT_info\n" // Restore %ds (from %ss) - "movw %%ss, %%ax\n" - "movw %%ax, %%ds\n" - : : "c" (regs->cx), "r" (si + 8) - : "eax", "di", "si"); // XXX - also clobbers %es + " movw %%ss, %%ax\n" + " movw %%ax, %%ds\n" + : "+c"(count), "+S"(si) + : : "eax", "di", "cc"); // XXX - also clobbers %es set_a20(prev_a20_enable); - handle_ret(regs, 0); + set_code_success(regs); } // Get the amount of extended memory (above 1M) static void handle_1588(struct bregs *regs) { - regs->al = inb_cmos(CMOS_EXTMEM_LOW); - regs->ah = inb_cmos(CMOS_EXTMEM_HIGH); + u32 rs = GET_GLOBAL(RamSize); + // According to Ralf Brown's interrupt the limit should be 15M, // but real machines mostly return max. 63M. - if (regs->ax > 0xffc0) - regs->ax = 0xffc0; - set_cf(regs, 0); + if (rs > 64*1024*1024) + regs->ax = 63 * 1024; + else + regs->ax = (rs - 1*1024*1024) / 1024; + set_success(regs); +} + +// Switch to protected mode +static void +handle_1589(struct bregs *regs) +{ + set_a20(1); + + set_pics(regs->bl, regs->bh); + + u64 *gdt_far = (void*)(regs->si + 0); + u16 gdt_seg = regs->es; + SET_FARVAR(gdt_seg, gdt_far[7], GDT_CODE | GDT_LIMIT(BUILD_BIOS_SIZE-1) + | GDT_BASE(BUILD_BIOS_ADDR)); + + regs->ds = 3<<3; // 3rd gdt descriptor is %ds + regs->es = 4<<3; // 4th gdt descriptor is %es + regs->code.seg = 6<<3; // 6th gdt descriptor is %cs + + set_code_success(regs); + + asm volatile( + // Load new descriptor tables + " lgdtw %%es:(1<<3)(%%si)\n" + " lidtw %%es:(2<<3)(%%si)\n" + + // Enable protected mode + " movl %%cr0, %%eax\n" + " orl $" __stringify(CR0_PE) ", %%eax\n" + " movl %%eax, %%cr0\n" + + // far jump to flush CPU queue after transition to protected mode + " ljmpw $(7<<3), $1f\n" + + // GDT points to valid descriptor table, now load SS + "1:movw $(5<<3), %%ax\n" + " movw %%ax, %%ds\n" + " movw %%ax, %%ss\n" + : + : "S"(gdt_far) + : "eax", "cc"); } // Device busy interrupt. Called by Int 16h when no key available @@ -235,22 +242,22 @@ handle_1591(struct bregs *regs) static void handle_154f(struct bregs *regs) { - set_cf(regs, 1); + set_invalid_silent(regs); } static void handle_15c0(struct bregs *regs) { regs->es = SEG_BIOS; - regs->bx = (u16)&BIOS_CONFIG_TABLE; - handle_ret(regs, 0); + regs->bx = (u32)&BIOS_CONFIG_TABLE; + set_code_success(regs); } static void handle_15c1(struct bregs *regs) { - regs->es = GET_BDA(ebda_seg); - set_cf(regs, 0); + regs->es = get_ebda_seg(); + set_success(regs); } static void @@ -263,128 +270,56 @@ handle_15e801(struct bregs *regs) // regs.u.r16.ax = 0; // regs.u.r16.bx = 0; - // Get the amount of extended memory (above 1M) - regs->cl = inb_cmos(CMOS_EXTMEM_LOW); - regs->ch = inb_cmos(CMOS_EXTMEM_HIGH); + u32 rs = GET_GLOBAL(RamSize); - // limit to 15M - if (regs->cx > 0x3c00) - regs->cx = 0x3c00; - - // Get the amount of extended memory above 16M in 64k blocs - regs->dl = inb_cmos(CMOS_EXTMEM2_LOW); - regs->dh = inb_cmos(CMOS_EXTMEM2_HIGH); + // Get the amount of extended memory (above 1M) + if (rs > 16*1024*1024) { + // limit to 15M + regs->cx = 15*1024; + // Get the amount of extended memory above 16M in 64k blocks + regs->dx = (rs - 16*1024*1024) / (64*1024); + } else { + regs->cx = (rs - 1*1024*1024) / 1024; + regs->dx = 0; + } // Set configured memory equal to extended memory regs->ax = regs->cx; regs->bx = regs->dx; - set_cf(regs, 0); + set_success(regs); } -#define ACPI_DATA_SIZE 0x00010000L - -static void -set_e820_range(u16 DI, u32 start, u32 end, u16 type) -{ - SET_VAR(ES, *(u16*)(DI+0), start); - SET_VAR(ES, *(u16*)(DI+2), start >> 16); - SET_VAR(ES, *(u16*)(DI+4), 0x00); - SET_VAR(ES, *(u16*)(DI+6), 0x00); - - end -= start; - SET_VAR(ES, *(u16*)(DI+8), end); - SET_VAR(ES, *(u16*)(DI+10), end >> 16); - SET_VAR(ES, *(u16*)(DI+12), 0x0000); - SET_VAR(ES, *(u16*)(DI+14), 0x0000); - - SET_VAR(ES, *(u16*)(DI+16), type); - SET_VAR(ES, *(u16*)(DI+18), 0x0); -} +// Info on e820 map location and size. +struct e820entry e820_list[CONFIG_MAX_E820] VAR16VISIBLE; +int e820_count VAR16VISIBLE; -// XXX - should create e820 memory map in post and just copy it here. static void handle_15e820(struct bregs *regs) { - if (regs->edx != 0x534D4150) { - handle_ret(regs, RET_EUNSUPPORTED); + int count = GET_GLOBAL(e820_count); + if (regs->edx != 0x534D4150 || regs->bx >= count + || regs->ecx < sizeof(e820_list[0])) { + set_code_invalid(regs, RET_EUNSUPPORTED); return; } - u32 extended_memory_size = inb_cmos(CMOS_EXTMEM2_HIGH); - extended_memory_size <<= 8; - extended_memory_size |= inb_cmos(CMOS_EXTMEM2_LOW); - extended_memory_size *= 64; - // greater than EFF00000??? - if (extended_memory_size > 0x3bc000) - // everything after this is reserved memory until we get to 0x100000000 - extended_memory_size = 0x3bc000; - extended_memory_size *= 1024; - extended_memory_size += (16L * 1024 * 1024); - - if (extended_memory_size <= (16L * 1024 * 1024)) { - extended_memory_size = inb_cmos(CMOS_EXTMEM_HIGH); - extended_memory_size <<= 8; - extended_memory_size |= inb_cmos(CMOS_EXTMEM_LOW); - extended_memory_size *= 1024; - } - - switch (regs->bx) { - case 0: - set_e820_range(regs->di, 0x0000000L, 0x0009fc00L, 1); - regs->ebx = 1; - regs->eax = 0x534D4150; - regs->ecx = 0x14; - set_cf(regs, 0); - break; - case 1: - set_e820_range(regs->di, 0x0009fc00L, 0x000a0000L, 2); - regs->ebx = 2; - regs->eax = 0x534D4150; - regs->ecx = 0x14; - set_cf(regs, 0); - break; - case 2: - set_e820_range(regs->di, 0x000e8000L, 0x00100000L, 2); - regs->ebx = 3; - regs->eax = 0x534D4150; - regs->ecx = 0x14; - set_cf(regs, 0); - break; - case 3: - set_e820_range(regs->di, 0x00100000L, - extended_memory_size - ACPI_DATA_SIZE, 1); - regs->ebx = 4; - regs->eax = 0x534D4150; - regs->ecx = 0x14; - set_cf(regs, 0); - break; - case 4: - set_e820_range(regs->di, - extended_memory_size - ACPI_DATA_SIZE, - extended_memory_size, 3); // ACPI RAM - regs->ebx = 5; - regs->eax = 0x534D4150; - regs->ecx = 0x14; - set_cf(regs, 0); - break; - case 5: - /* 256KB BIOS area at the end of 4 GB */ - set_e820_range(regs->di, 0xfffc0000L, 0x00000000L, 2); + memcpy_far(regs->es, (void*)(regs->di+0) + , get_global_seg(), &e820_list[regs->bx] + , sizeof(e820_list[0])); + if (regs->bx == count-1) regs->ebx = 0; - regs->eax = 0x534D4150; - regs->ecx = 0x14; - set_cf(regs, 0); - break; - default: /* AX=E820, DX=534D4150, BX unrecognized */ - handle_ret(regs, RET_EUNSUPPORTED); - } + else + regs->ebx++; + regs->eax = 0x534D4150; + regs->ecx = sizeof(e820_list[0]); + set_success(regs); } static void handle_15e8XX(struct bregs *regs) { - handle_ret(regs, RET_EUNSUPPORTED); + set_code_unimplemented(regs, RET_EUNSUPPORTED); } static void @@ -400,23 +335,25 @@ handle_15e8(struct bregs *regs) static void handle_15XX(struct bregs *regs) { - handle_ret(regs, RET_EUNSUPPORTED); + set_code_unimplemented(regs, RET_EUNSUPPORTED); } // INT 15h System Services Entry Point -void VISIBLE +void VISIBLE16 handle_15(struct bregs *regs) { - //debug_enter(regs); + debug_enter(regs, DEBUG_HDL_15); switch (regs->ah) { case 0x24: handle_1524(regs); break; case 0x4f: handle_154f(regs); break; case 0x52: handle_1552(regs); break; case 0x53: handle_1553(regs); break; + case 0x5f: handle_155f(regs); break; case 0x83: handle_1583(regs); break; case 0x86: handle_1586(regs); break; case 0x87: handle_1587(regs); break; case 0x88: handle_1588(regs); break; + case 0x89: handle_1589(regs); break; case 0x90: handle_1590(regs); break; case 0x91: handle_1591(regs); break; case 0xc0: handle_15c0(regs); break; @@ -425,61 +362,4 @@ handle_15(struct bregs *regs) case 0xe8: handle_15e8(regs); break; default: handle_15XX(regs); break; } - debug_exit(regs); -} - -// INT 12h Memory Size Service Entry Point -void VISIBLE -handle_12(struct bregs *regs) -{ - debug_enter(regs); - regs->ax = GET_BDA(mem_size_kb); - debug_exit(regs); -} - -// INT 11h Equipment List Service Entry Point -void VISIBLE -handle_11(struct bregs *regs) -{ - debug_enter(regs); - regs->ax = GET_BDA(equipment_list_flags); - debug_exit(regs); -} - -// INT 05h Print Screen Service Entry Point -void VISIBLE -handle_05(struct bregs *regs) -{ - debug_enter(regs); -} - -// INT 10h Video Support Service Entry Point -void VISIBLE -handle_10(struct bregs *regs) -{ - debug_enter(regs); - // dont do anything, since the VGA BIOS handles int10h requests -} - -void VISIBLE -handle_nmi(struct bregs *regs) -{ - debug_isr(regs); - // XXX -} - -// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION -void VISIBLE -handle_75(struct bregs *regs) -{ - debug_isr(regs); - - // clear irq13 - outb(0, PORT_MATH_CLEAR); - // clear interrupt - eoi_both_pics(); - // legacy nmi call - struct bregs br; - memset(&br, 0, sizeof(br)); - call16_int(0x02, &br); }