X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsuperio%2Fwinbond%2Fw83627ehg%2Fsuperio.c;h=cc65a651608d66ed02423dec537e9a141ac100e2;hb=340fa9396b4b73fd894a15fe48882c98d74292ce;hp=d12bb67be385b25b15b712930150e831e6578444;hpb=2ee6779a64922af755a35ce70f85f2d67b488557;p=coreboot.git diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index d12bb67be..cc65a6516 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -3,7 +3,7 @@ * * Copyright (C) 2000 AG Electronics Ltd. * Copyright (C) 2003-2004 Linux Networx - * Copyright (C) 2004 Tyan + * Copyright (C) 2004 Tyan * Copyright (C) 2007 AMD * Written by Yinghai Lu for AMD. * @@ -36,83 +36,84 @@ static void pnp_enter_ext_func_mode(device_t dev) { - outb(0x87, dev->path.u.pnp.port); - outb(0x87, dev->path.u.pnp.port); + outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); } static void pnp_exit_ext_func_mode(device_t dev) { - outb(0xaa, dev->path.u.pnp.port); + outb(0xaa, dev->path.pnp.port); } -static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value) +static void pnp_write_index(u16 port, u8 reg, u8 value) { - outb(reg, port_base); - outb(value, port_base + 1); + outb(reg, port); + outb(value, port + 1); } -static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg) +static u8 pnp_read_index(u16 port, u8 reg) { - outb(reg, port_base); - return inb(port_base + 1); + outb(reg, port); + return inb(port + 1); } -static void enable_hwm_smbus(device_t dev) { - /* Set the pin 91,92 as I2C bus. */ - uint8_t reg, value; - reg = 0x2a; - value = pnp_read_config(dev, reg); - value |= (1 << 1); - pnp_write_config(dev, reg, value); +static void enable_hwm_smbus(device_t dev) +{ + u8 reg8; + + /* Configure pins 91/92 as SDA/SCL (I2C bus). */ + reg8 = pnp_read_config(dev, 0x2a); + reg8 |= (1 << 1); + pnp_write_config(dev, 0x2a, reg8); } static void init_acpi(device_t dev) { - uint8_t value = 0x20; + u8 value = 0x20; /* TODO: 0x20 value here never used? */ int power_on = 1; get_option(&power_on, "power_on_after_fail"); pnp_enter_ext_func_mode(dev); - pnp_write_index(dev->path.u.pnp.port, 7, 0x0a); + pnp_set_logical_device(dev); value = pnp_read_config(dev, 0xe4); value &= ~(3 << 5); - if (power_on) { + if (power_on) value |= (1 << 5); - } pnp_write_config(dev, 0xe4, value); pnp_exit_ext_func_mode(dev); } -static void init_hwm(unsigned long base) +static void init_hwm(u16 base) { int i; - uint8_t reg, value; + u8 reg, value; /* reg mask data */ - unsigned hwm_reg_values[] = { + u8 hwm_reg_values[] = { 0x40, 0xff, 0x81, /* Start HWM. */ - 0x48, 0x7f, 0x2a, /* Set SMBus base to 0x54 >> 1. */ + 0x48, 0x7f, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */ }; - for(i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) { + for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) { reg = hwm_reg_values[i]; value = pnp_read_index(base, reg); value &= 0xff & (~(hwm_reg_values[i + 1])); value |= 0xff & hwm_reg_values[i + 2]; - // printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value); + printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, " + "value = 0x%02x\n", base, reg, value); pnp_write_index(base, reg, value); } } static void w83627ehg_init(device_t dev) { - struct superio_winbond_w83627ehg_config *conf; + struct superio_winbond_w83627ehg_config *conf = dev->chip_info; struct resource *res0, *res1; - if (!dev->enabled) { + + if (!dev->enabled) return; - } - conf = dev->chip_info; - switch(dev->path.u.pnp.device) { + + switch(dev->path.pnp.device) { case W83627EHG_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); @@ -124,7 +125,7 @@ static void w83627ehg_init(device_t dev) case W83627EHG_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + pc_keyboard_init(&conf->keyboard); break; case W83627EHG_HWM: res0 = find_resource(dev, PNP_IDX_IO0); @@ -137,21 +138,21 @@ static void w83627ehg_init(device_t dev) } } -void w83627ehg_pnp_set_resources(device_t dev) +static void w83627ehg_pnp_set_resources(device_t dev) { pnp_enter_ext_func_mode(dev); pnp_set_resources(dev); pnp_exit_ext_func_mode(dev); } -void w83627ehg_pnp_enable_resources(device_t dev) +static void w83627ehg_pnp_enable_resources(device_t dev) { pnp_enter_ext_func_mode(dev); pnp_enable_resources(dev); - switch (dev->path.u.pnp.device) { + switch (dev->path.pnp.device) { case W83627EHG_HWM: - printk_debug("w83627ehg hwm smbus enabled\n"); + printk(BIOS_DEBUG, "W83627EHG HWM SMBus enabled\n"); enable_hwm_smbus(dev); break; } @@ -159,14 +160,15 @@ void w83627ehg_pnp_enable_resources(device_t dev) pnp_exit_ext_func_mode(dev); } -void w83627ehg_pnp_enable(device_t dev) +static void w83627ehg_pnp_enable(device_t dev) { - if (!dev->enabled) { - pnp_enter_ext_func_mode(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_exit_ext_func_mode(dev); - } + if (dev->enabled) + return; + + pnp_enter_ext_func_mode(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_exit_ext_func_mode(dev); } static struct device_operations ops = { @@ -182,7 +184,6 @@ static struct pnp_info pnp_dev_info[] = { { &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, { &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - // No 4 { 0,}, { &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, { &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, W83627EHG_WDTO_PLED, }, @@ -200,12 +201,10 @@ static struct pnp_info pnp_dev_info[] = { static void enable_dev(struct device *dev) { - pnp_enable_devices(dev, &ops, - ARRAY_SIZE(pnp_dev_info), pnp_dev_info); + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); } struct chip_operations superio_winbond_w83627ehg_ops = { CHIP_NAME("Winbond W83627EHG Super I/O") .enable_dev = enable_dev, }; -