X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsuperio%2Fnsc%2Fpc97317%2Fsuperio.c;h=2dced4189827df79d8b172a9f91e326ba7134b23;hb=5330dd91741d12ae52b9c5db179c1a6c24f3e56c;hp=7945564bf3e7b461f980dac70ef0c1f2a56f0090;hpb=2ee6779a64922af755a35ce70f85f2d67b488557;p=coreboot.git

diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c
index 7945564bf..2dced4189 100644
--- a/src/superio/nsc/pc97317/superio.c
+++ b/src/superio/nsc/pc97317/superio.c
@@ -1,5 +1,22 @@
-/* Copyright 2000  AG Electronics Ltd. */
-/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
 
 #include <arch/io.h>
 #include <console/console.h>
@@ -12,13 +29,13 @@
 static void init(device_t dev)
 {
 	struct superio_nsc_pc97317_config *conf;
-	struct resource *res0, *res1;
+	struct resource *res0;
 
 	if (!dev->enabled) {
 		return;
 	}
 	conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
 	case PC97317_SP1:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
@@ -36,9 +53,7 @@ static void init(device_t dev)
 		pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 Mhz */
 		pnp_set_enable(dev, 1); /* Enable keyboard */
 
-		res0 = find_resource(dev, PNP_IDX_IO0);
-		res1 = find_resource(dev, PNP_IDX_IO1);
-		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		pc_keyboard_init(&conf->keyboard);
 		break;
 
 #if 0
@@ -68,15 +83,15 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
- { &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
- { &ops, PC97317_KBCM, PNP_IRQ0 },
- { &ops, PC97317_RTC,  PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
- { &ops, PC97317_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
- { &ops, PC97317_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
- { &ops, PC97317_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
- { &ops, PC97317_SP1,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
- { &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } },
- { &ops, PC97317_PM,   PNP_IO0, { 0xfffe, 0 } },
+	{ &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
+	{ &ops, PC97317_KBCM, PNP_IRQ0 },
+	{ &ops, PC97317_RTC,  PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
+	{ &ops, PC97317_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
+	{ &ops, PC97317_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
+	{ &ops, PC97317_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
+	{ &ops, PC97317_SP1,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
+	{ &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } },
+	{ &ops, PC97317_PM,   PNP_IO0, { 0xfffe, 0 } },
 };
 
 static void enable_dev(struct device *dev)