X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsuperio%2Ffintek%2Ff71805f%2Fsuperio.c;h=e1012bae51ca6c3a41c21ffb6373065c89fc420f;hb=a69d978be8a068944466e776de87527fb104a878;hp=51e8364d65b2e67b538eb7003583f8e338721a9f;hpb=9d10dc4ffc144bc8d952047c39f7fc1b109193e8;p=coreboot.git diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c index 51e8364d6..e1012bae5 100644 --- a/src/superio/fintek/f71805f/superio.c +++ b/src/superio/fintek/f71805f/superio.c @@ -18,8 +18,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* Datasheet: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf */ - #include #include #include @@ -29,52 +27,53 @@ #include "chip.h" #include "f71805f.h" -static void pnp_enter_conf_state(device_t dev) +static void pnp_enter_conf_state(device_t dev) { - outb(0x87, dev->path.u.pnp.port); + outb(0x87, dev->path.pnp.port); + outb(0x87, dev->path.pnp.port); } -static void pnp_exit_conf_state(device_t dev) +static void pnp_exit_conf_state(device_t dev) { - outb(0xaa, dev->path.u.pnp.port); + outb(0xaa, dev->path.pnp.port); } static void f71805f_init(device_t dev) { struct superio_fintek_f71805f_config *conf = dev->chip_info; - struct resource *res0, *res1; + struct resource *res0; if (!dev->enabled) return; - - switch(dev->path.u.pnp.device) { + + switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71805F_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); break; case F71805F_SP2: - res1 = find_resource(dev, PNP_IDX_IO0); + res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com2); break; } } -void f71805f_pnp_set_resources(device_t dev) +static void f71805f_pnp_set_resources(device_t dev) { pnp_enter_conf_state(dev); pnp_set_resources(dev); pnp_exit_conf_state(dev); } -void f71805f_pnp_enable_resources(device_t dev) +static void f71805f_pnp_enable_resources(device_t dev) { pnp_enter_conf_state(dev); pnp_enable_resources(dev); pnp_exit_conf_state(dev); } -void f71805f_pnp_enable(device_t dev) +static void f71805f_pnp_enable(device_t dev) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); @@ -91,12 +90,12 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - /* TODO: Some of the 0x7f8 etc. values may not be correct. */ - { &ops, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, - { &ops, F71805F_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, }, + /* TODO: Some of the 0x07f8 etc. values may not be correct. */ + { &ops, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, F71805F_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, { &ops, F71805F_GPIO, PNP_IRQ0, }, { &ops, F71805F_PME, }, }; @@ -107,7 +106,6 @@ static void enable_dev(device_t dev) } struct chip_operations superio_fintek_f71805f_ops = { - CHIP_NAME("Fintek F71805F Super I/O") + CHIP_NAME("Fintek F71805F/FG Super I/O") .enable_dev = enable_dev }; -