X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Fvia%2Fk8t890%2Fk8t890_dram.c;h=4f99fec1554657feb267c6fc4729abc7eb5e21d2;hb=a3c10acaacb6baeac377338dae3bc0d5b0fb104a;hp=00e5fa5f24eda666015c7ecc1c65a7dbd7f76b14;hpb=316e07fb04c4de11b8be717c73f9a80baf0fece6;p=coreboot.git diff --git a/src/southbridge/via/k8t890/k8t890_dram.c b/src/southbridge/via/k8t890/k8t890_dram.c index 00e5fa5f2..4f99fec15 100644 --- a/src/southbridge/via/k8t890/k8t890_dram.c +++ b/src/southbridge/via/k8t890/k8t890_dram.c @@ -4,8 +4,8 @@ * Copyright (C) 2007 Rudolf Marek * * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License v2 as published by - * the Free Software Foundation. + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -23,6 +23,7 @@ #include #include #include +#include #include #include "k8t890.h" @@ -63,70 +64,87 @@ static void dram_enable(struct device *dev) /* The Address Next to the Last Valid DRAM Address */ pci_write_config16(dev, 0x88, (msr.lo >> 24) | reg); + } -static struct resource *resmax; +#if CONFIG_GFXUMA +extern uint64_t uma_memory_base, uma_memory_size; +#endif -static void get_memres(void *gp, struct device *dev, struct resource *res) +static void dram_enable_k8m890(struct device *dev) { - unsigned int *fbsize = (unsigned int *) gp; - uint64_t proposed_base = res->base + res->size - *fbsize; - - printk_debug("get_memres: res->base=%llx res->size=%llx %d %d %d\n", - res->base, res->size, (res->size > *fbsize), - (!(proposed_base & (*fbsize - 1))), - (proposed_base < ((uint64_t) 0xffffffff))); - - /* if we fit and also align OK, and must be below 4GB */ - if ((res->size > *fbsize) && (!(proposed_base & (*fbsize - 1))) && - (proposed_base < ((uint64_t) 0xffffffff) )) { - resmax = res; +#if CONFIG_GFXUMA + msr_t msr; + int ret; + unsigned int fbbits; + + /* use CMOS */ + if (CONFIG_VIDEO_MB == -1) { + ret = get_option(&fbbits, "videoram_size"); + if (ret) { + printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret); + fbbits = 5; + } + + if ((fbbits < 1) || (fbbits > 7)) { + printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n", + 4 << fbbits); + fbbits = 5; + } + uma_memory_size = 4 << (fbbits + 20); + } else { + uma_memory_size = (CONFIG_VIDEO_MB << 20); } + + msr = rdmsr(TOP_MEM); + uma_memory_base = msr.lo - uma_memory_size; + printk(BIOS_INFO, "K8M890: UMA base is %llx size is %d (MB)\n", uma_memory_base, uma_memory_size / 1024 / 1024); + /* enable VGA, so the bridges gets VGA_EN and resources are set */ + pci_write_config8(dev, 0xa1, 0x80); +#endif + dram_enable(dev); } +int +k8m890_host_fb_size_get(void) +{ + struct device *dev = dev_find_device(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_K8M890CE_3, 0); + unsigned char tmp; + + tmp = pci_read_config8(dev, 0xA1); + tmp >>= 4; + if (tmp & 0x08) + return 4 << (tmp & 7); + else + return 0; +} static void dram_init_fb(struct device *dev) { +#if CONFIG_GFXUMA /* Important bits: * Enable the internal GFX bit 7 of reg 0xa1 plus in same reg: - * bits 6:4 X fbuffer size will be 2^(X+2) or 100 = 64MB, 101 = 128MB + * bits 6:4 X fbuffer size will be 2^(X+2) or 100 = 64MB, 101 = 128MB * bits 3:0 BASE [31:28] * reg 0xa0 bits 7:1 BASE [27:21] bit0 enable CPU access */ + unsigned int fbbits = 0; u8 tmp; - uint64_t proposed_base; - unsigned int fbsize = (K8M890_FBSIZEMB * 1024 * 1024); - - resmax = NULL; - search_global_resources( - IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, - get_memres, (void *) &fbsize); - - /* no space for FB */ - if (!resmax) { - printk_err("VIA FB: no space for framebuffer in RAM\n"); - return; - } + int ret; - proposed_base = resmax->base + resmax->size - fbsize; - resmax->size -= fbsize; + fbbits = ((log2(uma_memory_size >> 20) - 2) << 4); + printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", (unsigned int) (uma_memory_size >> 20)); - printk_debug("VIA FB proposed base: %llx\n", proposed_base); - - /* enable UMA but no FB */ + /* Step 1: enable UMA but no FB */ pci_write_config8(dev, 0xa1, 0x80); - /* 27:21 goes to 7:1, 0 is enable CPU access */ - tmp = (proposed_base >> 20) | 0x1; - pci_write_config8(dev, 0xa0, tmp); - - /* 31:28 goes to 3:0 */ - tmp = ((proposed_base >> 28) & 0xf); - tmp = ((log2(K8M890_FBSIZEMB) - 2) << 4); - tmp |= 0x80; + /* Step 2: enough is just the FB size, the CPU accessible address is not needed */ + tmp = fbbits | 0x80; pci_write_config8(dev, 0xa1, tmp); /* TODO K8 needs some UMA fine tuning too maybe call some generic routine here? */ +#endif } static const struct device_operations dram_ops_t = { @@ -141,7 +159,7 @@ static const struct device_operations dram_ops_m = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .enable = dram_enable, + .enable = dram_enable_k8m890, .init = dram_init_fb, .ops_pci = 0, };