X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Fintel%2Fi82870%2Fp64h2_ioapic.c;h=8af57beed7298b4d641beaef05f080b8982de151;hb=b69cb5a31058c0295f2d810c852cc5b52d77225c;hp=0f998dda9e8ea5c63df7b0e1d2f06b8311d43a6c;hpb=b907d321a5d0957f5cbb03d8f9c8d0ff0c23523b;p=coreboot.git

diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c
index 0f998dda9..8af57beed 100644
--- a/src/southbridge/intel/i82870/p64h2_ioapic.c
+++ b/src/southbridge/intel/i82870/p64h2_ioapic.c
@@ -18,15 +18,15 @@ static void p64h2_ioapic_enable(device_t dev)
     pci_write_config16(dev, PCI_COMMAND, command);
 }
 
-//----------------------------------------------------------------------------------
-// Function:        p64h2_ioapic_init
-// Parameters:      dev - PCI bus/device/function of P64H2 IOAPIC
-//                  NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0
-// Return Value:    None
-// Description:     Configure one of the IOAPICs in a P64H2.
-//                  Note that a PCI bus scan will detect both IOAPICs, so this function
-//                  will be called twice for each P64H2 in the system.
-//
+/**
+ * Configure one of the IOAPICs in a P64H2.
+ *
+ * Note that a PCI bus scan will detect both IOAPICs, so this function
+ * will be called twice for each P64H2 in the system.
+ *
+ * @param dev PCI bus/device/function of P64H2 IOAPIC.
+ *            NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0.
+ */
 static void p64h2_ioapic_init(device_t dev)
 {
     uint32_t memoryBase;