X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Fintel%2Fi82801ax%2Fchip.h;h=21b6f9fcf30cde728be44a3d62409edb66785dd0;hb=ab06fb0caea2469fdf212a7655517a836a8dede6;hp=0c164fd325fccf0a7efe1b1054fcaba0614bc67b;hpb=138cdbb17b9ae8543a65a6b61ab6daac5c6ef7f7;p=coreboot.git

diff --git a/src/southbridge/intel/i82801ax/chip.h b/src/southbridge/intel/i82801ax/chip.h
index 0c164fd32..21b6f9fcf 100644
--- a/src/southbridge/intel/i82801ax/chip.h
+++ b/src/southbridge/intel/i82801ax/chip.h
@@ -25,22 +25,16 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801AX_CHIP_H
 #define SOUTHBRIDGE_INTEL_I82801AX_CHIP_H
 
+#include <stdint.h>
+
 struct southbridge_intel_i82801ax_config {
-	/**
-	 * Interrupt Routing configuration
-	 * If bit7 is 1, the interrupt is disabled.
-	 */
-	uint8_t pirqa_routing;
-	uint8_t pirqb_routing;
-	uint8_t pirqc_routing;
-	uint8_t pirqd_routing;
-	uint8_t pirqe_routing;
-	uint8_t pirqf_routing;
-	uint8_t pirqg_routing;
-	uint8_t pirqh_routing;
+	u8 pirqa_routing;
+	u8 pirqb_routing;
+	u8 pirqc_routing;
+	u8 pirqd_routing;
 
-	uint8_t ide0_enable;
-	uint8_t ide1_enable;
+	u8 ide0_enable;
+	u8 ide1_enable;
 };
 
 extern struct chip_operations southbridge_intel_i82801ax_ops;