X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Fintel%2Fi82371eb%2Fi82371eb_isa.c;h=0cc46a618c6e1efa0d7d1b629b356cc80a1be5dd;hb=74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1;hp=95a706df77808a9193f1a9404068c2a8f46634d1;hpb=7e61e45402aba2b90997f4f02ca8266cf65a229a;p=coreboot.git

diff --git a/src/southbridge/intel/i82371eb/i82371eb_isa.c b/src/southbridge/intel/i82371eb/i82371eb_isa.c
index 95a706df7..0cc46a618 100644
--- a/src/southbridge/intel/i82371eb/i82371eb_isa.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_isa.c
@@ -25,24 +25,16 @@
 #include <device/pci_ids.h>
 #include <pc80/isa-dma.h>
 #include <pc80/mc146818rtc.h>
+#include <arch/ioapic.h>
 #include "i82371eb.h"
 
 static void isa_init(struct device *dev)
 {
-	u16 reg16;
 	u32 reg32;
 
 	/* Initialize the real time clock (RTC). */
 	rtc_init(0);
 
-	/* Enable access to all BIOS regions. */
-	reg16 = pci_read_config16(dev, XBCS);
-	reg16 |= LOWER_BIOS_ENABLE;
-	reg16 |= EXT_BIOS_ENABLE;
-	reg16 |= EXT_BIOS_ENABLE_1MB;
-	reg16 &= ~(WRITE_PROTECT_ENABLE);	/* Disable ROM write access. */
-	pci_write_config16(dev, XBCS, reg16);
-
 	/*
 	 * The PIIX4 can support the full ISA bus, or the Extended I/O (EIO)
 	 * bus, which is a subset of ISA. We select the full ISA bus here.
@@ -55,8 +47,31 @@ static void isa_init(struct device *dev)
 	isa_dma_init();
 }
 
+static void sb_read_resources(struct device *dev)
+{
+	struct resource *res;
+
+	pci_dev_read_resources(dev);
+
+	res = new_resource(dev, 1);
+	res->base = 0x0UL;
+	res->size = 0x1000UL;
+	res->limit = 0xffffUL;
+	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+
+	res = new_resource(dev, 2);
+	res->base = 0xff800000UL;
+	res->size = 0x00800000UL; /* 8 MB for flash */
+	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+
+	res = new_resource(dev, 3); /* IOAPIC */
+	res->base = IO_APIC_ADDR;
+	res->size = 0x00001000;
+	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+}
+
 static const struct device_operations isa_ops = {
-	.read_resources		= pci_dev_read_resources,
+	.read_resources		= sb_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= isa_init,
@@ -70,3 +85,9 @@ static const struct pci_driver isa_driver __pci_driver = {
 	.vendor	= PCI_VENDOR_ID_INTEL,
 	.device	= PCI_DEVICE_ID_INTEL_82371AB_ISA,
 };
+
+static const struct pci_driver isa_SB_driver __pci_driver = {
+	.ops	= &isa_ops,
+	.vendor	= PCI_VENDOR_ID_INTEL,
+	.device	= PCI_DEVICE_ID_INTEL_82371SB_ISA,
+};