X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Famd%2Frs780%2Fpcie.c;fp=src%2Fsouthbridge%2Famd%2Frs780%2Fpcie.c;h=527a710cfbf1059b9e74861eb3d2c6143b03dcf0;hb=b5d81eb43db54bd807af68744ebefa429c95843a;hp=be80ed3e0e144c01c1128271f287602dd4f0ab47;hpb=f61fff92e4ff0de9c7e0efc6a8afaa42c5143822;p=coreboot.git

diff --git a/src/southbridge/amd/rs780/pcie.c b/src/southbridge/amd/rs780/pcie.c
index be80ed3e0..527a710cf 100644
--- a/src/southbridge/amd/rs780/pcie.c
+++ b/src/southbridge/amd/rs780/pcie.c
@@ -191,7 +191,7 @@ static void switching_gpp_configurations(device_t nb_dev, device_t sb_dev)
 	reg = nbmisc_read_index(nb_dev, 0x22);
 	reg |= 1 << 14;
 	nbmisc_write_index(nb_dev, 0x22, reg);
-	/* 5.6.2.2. sets desired GPPSB configurations, bit4-7 */
+	/* 5.6.2.2. sets desired GPP configurations, bit7-10 */
 	reg = nbmisc_read_index(nb_dev, 0x2D);
 	reg &= ~(0xF << 7);		/* clean */
 	reg |= cfg->gpp_configuration << 7;