X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Famd%2Fcs5530%2Fcs5530_isa.c;h=ff1617ddc308c29fb5381516393b7d9a5ae9559e;hb=74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1;hp=a4d3b2eadb3bdc5cb33e4b83add577a4d06dec8a;hpb=29cc9eda2021a87396ef31a6fc81daff6fd1be7a;p=coreboot.git

diff --git a/src/southbridge/amd/cs5530/cs5530_isa.c b/src/southbridge/amd/cs5530/cs5530_isa.c
index a4d3b2ead..ff1617ddc 100644
--- a/src/southbridge/amd/cs5530/cs5530_isa.c
+++ b/src/southbridge/amd/cs5530/cs5530_isa.c
@@ -20,6 +20,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -33,39 +34,24 @@ static void cs5530_read_resources(device_t dev)
 
 	res = new_resource(dev, 1);
 	res->base = 0x0UL;
-	res->size = 0x400UL;
+	res->size = 0x1000UL;
 	res->limit = 0xffffUL;
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
 static void isa_init(struct device *dev)
 {
-	uint8_t reg8;
-
-	// TODO: Test if needed, otherwise drop.
-
-	/* Set positive decode on ROM. */
-	reg8 = pci_read_config8(dev, DECODE_CONTROL_REG2);
-	reg8 |= BIOS_ROM_POSITIVE_DECODE;
-	pci_write_config8(dev, DECODE_CONTROL_REG2, reg8);
-}
-
-static void cs5530_pci_dev_enable_resources(device_t dev)
-{
-	// TODO: Needed?
-	pci_dev_enable_resources(dev);
-	enable_childrens_resources(dev);
 }
 
 static struct device_operations isa_ops = {
 	.read_resources		= cs5530_read_resources,
 	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= cs5530_pci_dev_enable_resources,
+	.enable_resources	= pci_dev_enable_resources,
 	.init			= isa_init,
 	.enable			= 0,
 	.scan_bus		= scan_static_bus,