X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fsouthbridge%2Famd%2Fcimx%2Fsb800%2FSBPLATFORM.h;h=db5343dff0b9ee89474758696eb5ed0a999c8680;hb=5ff7c13e858a31addf1558731a12cf6c753b576d;hp=93e1c310e63247f94de0de479286506e8423e733;hpb=05a89ab922473f375820a3bd68691bb085c62448;p=coreboot.git

diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
index 93e1c310e..db5343dff 100644
--- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
+++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
@@ -20,7 +20,7 @@
  * ***************************************************************************
  *
  */
- 
+
 #ifndef  _AMD_SBPLATFORM_H_
 #define  _AMD_SBPLATFORM_H_
 
@@ -57,6 +57,7 @@ typedef union _PCI_ADDR {
 #endif
 #define FIXUP_PTR(ptr)  ptr
 
+#include <console/console.h>
 #include "AmdSbLib.h"
 #include "Amd.h"
 #include "SB800.h"
@@ -65,7 +66,8 @@ typedef union _PCI_ADDR {
 #include "SBDEF.h"
 #include "AMDSBLIB.h"
 #include "SBSUBFUN.h"
-#include "OEM.h"
+#include "platform_cfg.h"	/* mainboard specific configuration */
+#include "OEM.h"		/* platform default configuration */
 #include "AMD.h"
 
 
@@ -110,7 +112,7 @@ typedef union _PCI_ADDR {
  */
 #define SB_CIMx_PARAMETER  0x02
 
-// Generic 
+// Generic
 #define cimSpreadSpectrumDefault        TRUE
 #define cimSpreadSpectrumTypeDefault	0x00      // Normal
 #define cimHpetTimerDefault             TRUE
@@ -118,7 +120,8 @@ typedef union _PCI_ADDR {
 #define cimIrConfigDefault              0x00      // Disable
 #define cimSpiFastReadEnableDefault     0x01      // Enable
 #define cimSpiFastReadSpeedDefault      0x01      // 33 MHz
-// GPP/AB Controller 
+#define cimSioHwmPortEnableDefault      FALSE
+// GPP/AB Controller
 #define cimNbSbGen2Default              TRUE
 #define cimAlinkPhyPllPowerDownDefault  TRUE
 #define cimResetCpuOnSyncFloodDefault   TRUE
@@ -126,13 +129,13 @@ typedef union _PCI_ADDR {
 #define cimGppMemWrImproveDefault       TRUE
 #define cimGppPortAspmDefault           FALSE
 #define cimGppLaneReversalDefault       FALSE
-#define cimGppPhyPllPowerDownDefault    TRUE 
+#define cimGppPhyPllPowerDownDefault    TRUE
 // USB Controller
 #define cimUsbPhyPowerDownDefault       FALSE
 // GEC Controller
 #define cimSBGecDebugBusDefault         FALSE
 #define cimSBGecPwrDefault              0x03
-// Sata Controller 
+// Sata Controller
 #define cimSataSetMaxGen2Default        0x00
 #define cimSATARefClkSelDefault         0x10
 #define cimSATARefDivSelDefault         0x80
@@ -140,11 +143,11 @@ typedef union _PCI_ADDR {
 #define cimSataPortMultCapDefault       TRUE
 #define cimSataPscCapDefault            0x00      // Enable
 #define cimSataSscCapDefault            0x00      // Enable
-#define cimSataFisBasedSwitchingDefault FALSE 
+#define cimSataFisBasedSwitchingDefault FALSE
 #define cimSataCccSupportDefault        FALSE
 #define cimSataClkAutoOffDefault        FALSE
 #define cimNativepciesupportDefault     FALSE
-// Fusion Related 
+// Fusion Related
 #define cimAcDcMsgDefault               FALSE
 #define cimTimerTickTrackDefault        FALSE
 #define cimClockInterruptTagDefault     FALSE
@@ -152,4 +155,7 @@ typedef union _PCI_ADDR {
 #define cimEhciTrafficHandingDefault    FALSE
 #define cimFusionMsgCMultiCoreDefault   FALSE
 #define cimFusionMsgCStageDefault       FALSE
+
+#include "vendorcode/amd/cimx/sb800/AMDSBLIB.h"
+
 #endif // _AMD_SBPLATFORM_H_