X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fpc_communication.vhd;h=dea269b6d13b4c8cd4f3b3205b86ea4839ef8f97;hb=d341fe2f64356e4777c2775ec539fd0d701dc965;hp=06884f00a28e858ad72b76972c9e7b63ecd50c21;hpb=4ead3cb9291b83f6446e5f4625c6afdc883a1078;p=hwmod.git diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd index 06884f0..dea269b 100644 --- a/src/pc_communication.vhd +++ b/src/pc_communication.vhd @@ -17,7 +17,7 @@ entity pc_communication is tx_done : in std_logic; --uart_rx - rx_data : in std_logic_vector(7 downto 0); --not really required + rx_data : in std_logic_vector(7 downto 0); rx_new : in std_logic; -- History @@ -32,13 +32,14 @@ end entity pc_communication; architecture beh of pc_communication is signal push_history, push_history_next : std_logic; - signal spalte, spalte_next : integer range 0 to 71; - signal zeile , zeile_next : integer range 0 to 71; + signal spalte, spalte_next : integer range 1 to hspalte_max + 1; + signal zeile , zeile_next : integer range 1 to hzeile_max + 1; signal spalte_up, spalte_up_next : std_logic; signal get, get_next : std_logic; signal new_i, new_i_next : std_logic; signal tx_done_i, tx_done_i_next : std_logic; signal d_done_i : std_logic; + signal s_done, s_done_next : std_logic; signal char, char_next : hbyte; signal char_en : std_logic; @@ -61,13 +62,14 @@ begin if sys_res_n = '0' then state <= IDLE; push_history <= '0'; - spalte <= 0; - zeile <= 0; + spalte <= 1; + zeile <= 1; get <= '0'; new_i <= '0'; tx_data <= "00000000"; spalte_up <= '0'; tx_done_i <= '0'; + s_done <= '0'; elsif rising_edge(sys_clk) then push_history <= push_history_next; spalte <= spalte_next; @@ -77,28 +79,13 @@ begin new_i <= new_i_next; tx_done_i <= tx_done_i_next; spalte_up <= spalte_up_next; + s_done <= s_done_next; if (char_en = '1') then char <= char_next; end if; end if; end process sync; - process (spalte_up, spalte, zeile) - begin - if (spalte_up = '1') then - if (spalte > 71) then - spalte_next <= 0; - zeile_next <= zeile + 1; - else - spalte_next <= spalte + 1; - zeile_next <= zeile; - end if; - else - spalte_next <= spalte; - zeile_next <= zeile; - end if; - end process; - async_push_history : process (rx_new, rx_data, btn_a) begin if rx_new = '1' then @@ -114,11 +101,32 @@ begin end if; end process async_push_history; - output_pc : process (state, zeile, spalte, char, tx_done_i) + output_pc : process (state, zeile, spalte, char, tx_done_i, spalte_up, spalte, zeile) begin get_next <= '0'; new_i_next <= '0'; + spalte_up_next <= '0'; + s_done_next <= '0'; + spalte_next <= spalte; + zeile_next <= zeile; + + if spalte_up = '1' then + if spalte = hspalte_max then + if zeile = hzeile_max then + spalte_next <= 1; + zeile_next <= 1; + s_done_next <= '1'; + else + spalte_next <= 1; + zeile_next <= zeile + 1; + end if; + else + spalte_next <= spalte + 1; --overflow here! + zeile_next <= zeile; + end if; + end if; + case state is when IDLE => null; @@ -132,22 +140,24 @@ begin if (tx_done_i = '1') then spalte_up_next <= '1'; end if; + when DONE => null; end case; end process output_pc; - next_state_pc : process (rx_new, btn_a, d_done, tx_done_i) + next_state_pc : process (rx_new, btn_a, d_done, tx_done_i, s_done) begin case state is when IDLE => if rx_new = '1' or btn_a = '1' then state_next <= FETCH; - end if; when FETCH => if (d_done = '1') then state_next <= FORWARD; + elsif (s_done = '1') then + state_next <= IDLE; end if; when FORWARD => if (tx_done_i = '1') then