X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fnorthbridge%2Fintel%2Fi82810%2Framinit.c;h=83b21b128649af5171eb2025a6a65b89e520a95c;hb=212d0a2eaefac97c55ad932e775be68a975fe164;hp=3ddc8a02e66811132a8fc6e1ea4b6c178020d5b5;hpb=6529c2a7172f166f53ec3d6204dd375cd6441579;p=coreboot.git

diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c
index 3ddc8a02e..83b21b128 100644
--- a/src/northbridge/intel/i82810/raminit.c
+++ b/src/northbridge/intel/i82810/raminit.c
@@ -22,7 +22,13 @@
 
 #include <spd.h>
 #include <delay.h>
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_def.h>
+#include <console/console.h>
 #include "i82810.h"
+#include "raminit.h"
 
 /*-----------------------------------------------------------------------------
 Macros and definitions.
@@ -421,7 +427,7 @@ static void set_dram_buffer_strength(void)
 Public interface.
 -----------------------------------------------------------------------------*/
 
-static void sdram_set_registers(void)
+void sdram_set_registers(void)
 {
 	u8 reg8;
 	u16 did;
@@ -454,7 +460,7 @@ static void sdram_set_registers(void)
 	pci_write_config8(PCI_DEV(0, 0, 0), MISSC2, reg8);
 }
 
-static void sdram_set_spd_registers(void)
+void sdram_set_spd_registers(void)
 {
 	spd_set_dram_size();
 	set_dram_buffer_strength();
@@ -464,7 +470,7 @@ static void sdram_set_spd_registers(void)
 /**
  * Enable SDRAM.
  */
-static void sdram_enable(void)
+void sdram_enable(void)
 {
 	int i;