X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmptable.c;h=103f46243d8cd3b89afa3fc44f97901f8e265908;hb=refs%2Fheads%2Fcoreboot;hp=49a88e44c10cb11504df088f046e167ba9a8da98;hpb=7b49cd9418a57d7845def97dcb33d17e399e3d91;p=seabios.git diff --git a/src/mptable.c b/src/mptable.c index 49a88e4..103f462 100644 --- a/src/mptable.c +++ b/src/mptable.c @@ -1,50 +1,16 @@ // MPTable generation (on emulators) // -// Copyright (C) 2008 Kevin O'Connor +// Copyright (C) 2008-2010 Kevin O'Connor // Copyright (C) 2006 Fabrice Bellard // -// This file may be distributed under the terms of the GNU GPLv3 license. +// This file may be distributed under the terms of the GNU LGPLv3 license. #include "util.h" // dprintf -#include "memmap.h" // bios_table_cur_addr #include "config.h" // CONFIG_* - -static void putb(u8 **pp, int val) -{ - u8 *q; - q = *pp; - *q++ = val; - *pp = q; -} - -static void putstr(u8 **pp, const char *str) -{ - u8 *q; - q = *pp; - while (*str) - *q++ = *str++; - *pp = q; -} - -static void putle16(u8 **pp, int val) -{ - u8 *q; - q = *pp; - *q++ = val; - *q++ = val >> 8; - *pp = q; -} - -static void putle32(u8 **pp, int val) -{ - u8 *q; - q = *pp; - *q++ = val; - *q++ = val >> 8; - *q++ = val >> 16; - *q++ = val >> 24; - *pp = q; -} +#include "mptable.h" // MPTABLE_SIGNATURE +#include "paravirt.h" // qemu_cfg_irq0_override +#include "pci.h" +#include "pci_regs.h" void mptable_init(void) @@ -54,110 +20,189 @@ mptable_init(void) dprintf(3, "init MPTable\n"); - u8 *mp_config_table, *q, *float_pointer_struct; - int ioapic_id, i, len; - int mp_config_table_size; - - int smp_cpus = smp_probe(); - if (smp_cpus <= 1) - // Building an mptable on uniprocessor machines confuses some OSes. + // Config structure in temp area. + struct mptable_config_s *config = malloc_tmp(32*1024); + if (!config) { + warn_noalloc(); return; - - bios_table_cur_addr = ALIGN(bios_table_cur_addr, 16); - mp_config_table = (u8 *)bios_table_cur_addr; - q = mp_config_table; - putstr(&q, "PCMP"); /* "PCMP signature */ - putle16(&q, 0); /* table length (patched later) */ - putb(&q, 4); /* spec rev */ - putb(&q, 0); /* checksum (patched later) */ - putstr(&q, CONFIG_CPUNAME8); /* OEM id */ - putstr(&q, "0.1 "); /* vendor id */ - putle32(&q, 0); /* OEM table ptr */ - putle16(&q, 0); /* OEM table size */ - putle16(&q, smp_cpus + 18); /* entry count */ - putle32(&q, 0xfee00000); /* local APIC addr */ - putle16(&q, 0); /* ext table length */ - putb(&q, 0); /* ext table checksum */ - putb(&q, 0); /* reserved */ - - for(i = 0; i < smp_cpus; i++) { - putb(&q, 0); /* entry type = processor */ - putb(&q, i); /* APIC id */ - putb(&q, 0x11); /* local APIC version number */ - if (i == 0) - putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */ - else - putb(&q, 1); /* cpu flags: enabled */ - putb(&q, 0); /* cpu signature */ - putb(&q, 6); - putb(&q, 0); - putb(&q, 0); - putle16(&q, 0x201); /* feature flags */ - putle16(&q, 0); - - putle16(&q, 0); /* reserved */ - putle16(&q, 0); - putle16(&q, 0); - putle16(&q, 0); + } + memset(config, 0, sizeof(*config)); + config->signature = MPCONFIG_SIGNATURE; + config->spec = 4; + memcpy(config->oemid, CONFIG_CPUNAME8, sizeof(config->oemid)); + memcpy(config->productid, "0.1 ", sizeof(config->productid)); + config->lapic = BUILD_APIC_ADDR; + + // Detect cpu info + u32 cpuid_signature, ebx, ecx, cpuid_features; + cpuid(1, &cpuid_signature, &ebx, &ecx, &cpuid_features); + if (! cpuid_signature) { + // Use default values. + cpuid_signature = 0x600; + cpuid_features = 0x201; + } + int pkgcpus = 1; + if (cpuid_features & (1 << 28)) { + /* Only populate the MPS tables with the first logical CPU in + each package */ + pkgcpus = (ebx >> 16) & 0xff; + pkgcpus = 1 << (__fls(pkgcpus - 1) + 1); /* round up to power of 2 */ + } + u8 apic_version = readl((u8*)BUILD_APIC_ADDR + 0x30) & 0xff; + + // CPU definitions. + struct mpt_cpu *cpus = (void*)&config[1], *cpu = cpus; + int i; + for (i = 0; i < MaxCountCPUs; i+=pkgcpus) { + memset(cpu, 0, sizeof(*cpu)); + cpu->type = MPT_TYPE_CPU; + cpu->apicid = i; + cpu->apicver = apic_version; + /* cpu flags: enabled, bootstrap cpu */ + cpu->cpuflag = ((icpusignature = cpuid_signature; + cpu->featureflag = cpuid_features; + cpu++; + } + int entrycount = cpu - cpus; + + // PCI buses + struct mpt_bus *buses = (void*)cpu, *bus = buses; + int lastbus = -1; + struct pci_device *pci; + foreachpci(pci) { + int curbus = pci_bdf_to_bus(pci->bdf); + if (curbus == lastbus) + continue; + lastbus = curbus; + memset(bus, 0, sizeof(*bus)); + bus->type = MPT_TYPE_BUS; + bus->busid = curbus; + memcpy(bus->bustype, "PCI ", sizeof(bus->bustype)); + bus++; } /* isa bus */ - putb(&q, 1); /* entry type = bus */ - putb(&q, 0); /* bus ID */ - putstr(&q, "ISA "); + int isabusid; + memset(bus, 0, sizeof(*bus)); + bus->type = MPT_TYPE_BUS; + isabusid = bus->busid = lastbus + 1; + memcpy(bus->bustype, "ISA ", sizeof(bus->bustype)); + bus++; + entrycount += bus - buses; /* ioapic */ - ioapic_id = smp_cpus; - putb(&q, 2); /* entry type = I/O APIC */ - putb(&q, ioapic_id); /* apic ID */ - putb(&q, 0x11); /* I/O APIC version number */ - putb(&q, 1); /* enable */ - putle32(&q, 0xfec00000); /* I/O APIC addr */ + u8 ioapic_id = CountCPUs; + struct mpt_ioapic *ioapic = (void*)bus; + memset(ioapic, 0, sizeof(*ioapic)); + ioapic->type = MPT_TYPE_IOAPIC; + ioapic->apicid = ioapic_id; + ioapic->apicver = 0x11; + ioapic->flags = 1; // enable + ioapic->apicaddr = BUILD_IOAPIC_ADDR; + entrycount++; /* irqs */ - for(i = 0; i < 16; i++) { - putb(&q, 3); /* entry type = I/O interrupt */ - putb(&q, 0); /* interrupt type = vectored interrupt */ - putb(&q, 0); /* flags: po=0, el=0 */ - putb(&q, 0); - putb(&q, 0); /* source bus ID = ISA */ - putb(&q, i); /* source bus IRQ */ - putb(&q, ioapic_id); /* dest I/O APIC ID */ - putb(&q, i); /* dest I/O APIC interrupt in */ + struct mpt_intsrc *intsrcs = (void*)&ioapic[1], *intsrc = intsrcs; + int dev = -1; + unsigned short mask = 0, pinmask = 0; + + foreachpci(pci) { + u16 bdf = pci->bdf; + int pin = pci_config_readb(bdf, PCI_INTERRUPT_PIN); + int irq = pci_config_readb(bdf, PCI_INTERRUPT_LINE); + if (pin == 0) + continue; + if (dev != pci_bdf_to_busdev(bdf)) { + dev = pci_bdf_to_busdev(bdf); + pinmask = 0; + } + if (pinmask & (1 << pin)) /* pin was seen already */ + continue; + pinmask |= (1 << pin); + mask |= (1 << irq); + memset(intsrc, 0, sizeof(*intsrc)); + intsrc->type = MPT_TYPE_INTSRC; + intsrc->irqtype = 0; /* INT */ + intsrc->irqflag = 1; /* active high */ + intsrc->srcbus = pci_bdf_to_bus(bdf); /* PCI bus */ + intsrc->srcbusirq = (pci_bdf_to_dev(bdf) << 2) | (pin - 1); + intsrc->dstapic = ioapic_id; + intsrc->dstirq = irq; + intsrc++; } - /* patch length */ - len = q - mp_config_table; - mp_config_table[4] = len; - mp_config_table[5] = len >> 8; - - mp_config_table[7] = -checksum(mp_config_table, q - mp_config_table); - mp_config_table_size = q - mp_config_table; + for (i = 0; i < 16; i++) { + memset(intsrc, 0, sizeof(*intsrc)); + if (mask & (1 << i)) + continue; + intsrc->type = MPT_TYPE_INTSRC; + intsrc->irqtype = 0; /* INT */ + intsrc->irqflag = 0; /* conform to bus spec */ + intsrc->srcbus = isabusid; /* ISA bus */ + intsrc->srcbusirq = i; + intsrc->dstapic = ioapic_id; + intsrc->dstirq = i; + if (qemu_cfg_irq0_override()) { + /* Destination 2 is covered by irq0->inti2 override (i == + 0). Source IRQ 2 is unused */ + if (i == 0) + intsrc->dstirq = 2; + else if (i == 2) + intsrc--; + } + intsrc++; + } - bios_table_cur_addr += mp_config_table_size; + /* Local interrupt assignment */ + intsrc->type = MPT_TYPE_LOCAL_INT; + intsrc->irqtype = 3; /* ExtINT */ + intsrc->irqflag = 0; /* PO, EL default */ + intsrc->srcbus = isabusid; /* ISA */ + intsrc->srcbusirq = 0; + intsrc->dstapic = 0; /* BSP == APIC #0 */ + intsrc->dstirq = 0; /* LINTIN0 */ + intsrc++; + + intsrc->type = MPT_TYPE_LOCAL_INT; + intsrc->irqtype = 1; /* NMI */ + intsrc->irqflag = 0; /* PO, EL default */ + intsrc->srcbus = isabusid; /* ISA */ + intsrc->srcbusirq = 0; + intsrc->dstapic = 0xff; /* to all local APICs */ + intsrc->dstirq = 1; /* LINTIN1 */ + intsrc++; + entrycount += intsrc - intsrcs; + + // Finalize config structure. + int length = (void*)intsrc - (void*)config; + config->entrycount = entrycount; + config->length = length; + config->checksum -= checksum(config, length); + + // Allocate final memory locations. (In theory the config + // structure can go in high memory, but Linux kernels before + // v2.6.30 crash with that.) + struct mptable_config_s *finalconfig = malloc_fseg(length); + struct mptable_floating_s *floating = malloc_fseg(sizeof(*floating)); + if (!finalconfig || !floating) { + warn_noalloc(); + free(config); + free(finalconfig); + free(floating); + return; + } + memcpy(finalconfig, config, length); + free(config); /* floating pointer structure */ - bios_table_cur_addr = ALIGN(bios_table_cur_addr, 16); - float_pointer_struct = (u8 *)bios_table_cur_addr; - q = float_pointer_struct; - putstr(&q, "_MP_"); - /* pointer to MP config table */ - putle32(&q, (unsigned long)mp_config_table); - - putb(&q, 1); /* length in 16 byte units */ - putb(&q, 4); /* MP spec revision */ - putb(&q, 0); /* checksum (patched later) */ - putb(&q, 0); /* MP feature byte 1 */ - - putb(&q, 0); - putb(&q, 0); - putb(&q, 0); - putb(&q, 0); - float_pointer_struct[10] = -checksum(float_pointer_struct - , q - float_pointer_struct); - bios_table_cur_addr += (q - float_pointer_struct); - dprintf(1, "MP table addr=0x%08lx MPC table addr=0x%08lx size=0x%x\n", - (unsigned long)float_pointer_struct, - (unsigned long)mp_config_table, - mp_config_table_size); + memset(floating, 0, sizeof(*floating)); + floating->signature = MPTABLE_SIGNATURE; + floating->physaddr = (u32)finalconfig; + floating->length = 1; + floating->spec_rev = 4; + floating->checksum -= checksum(floating, sizeof(*floating)); + + dprintf(1, "MP table addr=%p MPC table addr=%p size=%d\n", + floating, finalconfig, length); }