X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fvia%2Fepia-n%2Fromstage.c;h=22e12cb6787a17df481d700e581e46bf678fb48c;hb=9b9791c29d0f4e88127f59bb87d53cfed65cd912;hp=a2ed0abdee277ab904df3e53cba669e4366aba26;hpb=6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23;p=coreboot.git diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c index a2ed0abde..22e12cb67 100644 --- a/src/mainboard/via/epia-n/romstage.c +++ b/src/mainboard/via/epia-n/romstage.c @@ -27,7 +27,6 @@ #include #include #include -#include "lib/ramtest.c" #include "northbridge/via/cn400/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" @@ -39,6 +38,7 @@ #include #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1) +#define DUMMY_DEV PNP_DEV(0x2e, 0) static const struct mem_controller ctrl = { .d0f0 = 0x0000, @@ -62,7 +62,8 @@ static void enable_mainboard_devices(void) device_t dev; u8 reg; - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); if (dev == PCI_DEV_INVALID) die("Southbridge not found!!!\n"); @@ -109,15 +110,11 @@ static void main(unsigned long bist) /* Enable multifunction for northbridge. */ pci_write_config8(ctrl.d0f0, 0x4f, 0x01); - w83697hf_set_clksel_48(SERIAL_DEV); - + w83697hf_set_clksel_48(DUMMY_DEV); w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); - print_spew("In romstage.c:main()\n"); - enable_smbus(); smbus_fixup(&ctrl); @@ -130,19 +127,11 @@ static void main(unsigned long bist) print_debug("Enable F-ROM Shadow RAM\n"); enable_shadow_ram(); - /* setup cpu */ print_debug("Setup CPU Interface\n"); c3_cpu_setup(ctrl.d0f2); ddr_ram_setup(); - if (bist == 0) { - print_debug("doing early_mtrr\n"); + if (bist == 0) early_mtrr_init(); - } - - //ram_check(0, 640 * 1024); - - print_spew("Leaving romstage.c:main()\n"); } -