X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Ftechnexion%2Ftim8690%2Fromstage.c;h=276ca08682862ceb267b5a3baf1a2a8aab9ae7f6;hb=7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32;hp=38c8ba0ab10883aeca261941a08929264f3a9111;hpb=2bd91003413d431f0a4db6c3c6691f4b688cf5c5;p=coreboot.git diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index 38c8ba0ab..276ca0868 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -17,23 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define ASSEMBLY 1 -#define __PRE_RAM__ - -#define RAMINIT_SYSINFO 1 -#define K8_SET_FIDVID 1 -#define QRANK_DIMM_SUPPORT 1 -#if CONFIG_LOGICAL_CPUS==1 -#define SET_NB_CFG_54 1 -#endif - #define RC0 (6<<8) #define RC1 (7<<8) -#define DIMM0 0x50 -#define DIMM1 0x51 - -#define ICS951462_ADDRESS 0x69 #define SMBUS_HUB 0x71 #include @@ -43,42 +29,27 @@ #include #include #include -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "arch/i386/lib/console.c" - -#define post_code(x) outb(x, 0x80) - +#include +#include #include #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" - +#include #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/it8712f_early_serial.c" - -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" - #include "northbridge/amd/amdk8/setup_resource_map.c" - #include "southbridge/amd/rs690/rs690_early_setup.c" #include "southbridge/amd/sb600/sb600_early_setup.c" -/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/ -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - -/* called in raminit_f.c */ -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } -/*called in raminit_f.c */ static inline int spd_read_byte(u32 device, u32 address) { return smbus_read_byte(device, address); @@ -90,16 +61,10 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "resourcemap.c" - #include "cpu/amd/dualcore/dualcore.c" - -#include "cpu/amd/car/copy_and_run.c" #include "cpu/amd/car/post_cache_as_ram.c" - #include "cpu/amd/model_fxx/init_cpus.c" - #include "cpu/amd/model_fxx/fidvid.c" - #include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) @@ -111,19 +76,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct cpuid_result cpuid1; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - /* sb600_lpc_port80(); */ sb600_pci_port80(); } - if (bist == 0) { + if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); - } enable_rs690_dev8(); sb600_lpc_init(); @@ -132,11 +94,17 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) it8712f_enable_serial(0, CONFIG_TTYS0_BASE); it8712f_kill_watchdog(); uart_init(); + +#if CONFIG_USBDEBUG + sb600_enable_usbdebug(0); + early_usbdebug_init(); +#endif + console_init(); /* Halt if there was a built in self test failure */ report_bist_failure(bist); - printk_debug("bsp_apicid=0x%x\n", bsp_apicid); + printk(BIOS_DEBUG, "bsp_apicid=0x%x\n", bsp_apicid); setup_tim8690_resource_map(); @@ -158,11 +126,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Check to see if processor is capable of changing FIDVID */ /* otherwise it will throw a GP# when reading FIDVID_STATUS */ cpuid1 = cpuid(0x80000007); - if( (cpuid1.edx & 0x6) == 0x6 ) { - + if ((cpuid1.edx & 0x6) == 0x6 ) { /* Read FIDVID_STATUS */ msr=rdmsr(0xc0010042); - printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); enable_fid_change(); enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); @@ -170,27 +137,25 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* show final fid and vid */ msr=rdmsr(0xc0010042); - printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); - + printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); } else { - printk_debug("Changing FIDVID not supported\n"); + printk(BIOS_DEBUG, "Changing FIDVID not supported\n"); } needs_reset = optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); rs690_htinit(); - printk_debug("needs_reset=0x%x\n", needs_reset); - + printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } allow_all_aps_stop(bsp_apicid); /* It's the time to set ctrl now; */ - printk_debug("sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n", + printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n", sysinfo->nodes, sysinfo->ctrl, spd_addr); fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);