X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fsupermicro%2Fx6dhr_ig2%2Fmptable.c;h=146b40a1b2a8173b56c41d3b9c9e97087ee4af83;hb=74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1;hp=f71114446eacd92177036e600a619243e2538fa6;hpb=c02b4fc9db3c3c1e263027382697b566127f66bb;p=coreboot.git

diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
index f71114446..146b40a1b 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
@@ -1,13 +1,14 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
 
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
 {
 	static const char sig[4] = "PCMP";
-	static const char oem[8] = "LNXI    ";
+	static const char oem[8] = "COREBOOT";
 	static const char productid[12] = "X6DHR-iG    ";
 	struct mp_config_table *mc;
 	unsigned char bus_num;
@@ -36,7 +37,7 @@ void *smp_write_config_table(void *v)
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -98,9 +99,9 @@ void *smp_write_config_table(void *v)
 
 			bus_pxhd_4 = 6;
 		}
-	
+
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -109,7 +110,7 @@ void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		struct resource *res;
 		device_t dev;
@@ -135,40 +136,18 @@ void *smp_write_config_table(void *v)
 		else {
 			printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
 		}
-	}	
+	}
+	mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
+
 	/* ISA backward compatibility interrupts  */
-	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x00, 0x02, 0x00);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x01, 0x02, 0x01);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x00, 0x02, 0x02);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x03, 0x02, 0x03);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x04, 0x02, 0x04);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 		0x00, 0x74, 0x02, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x06, 0x02, 0x06);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 		0x00, 0x76, 0x02, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x08, 0x02, 0x08);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x09, 0x02, 0x09);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 		0x00, 0x77, 0x02, 0x17);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 		0x00, 0x75, 0x02, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x0c, 0x02, 0x0c);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x0d, 0x02, 0x0d);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x0e, 0x02, 0x0e);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x0f, 0x02, 0x0f);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
 		0x00, 0x74, 0x02, 0x10);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,