X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fsupermicro%2Fx6dhe_g%2Fromstage.c;h=1865a08dac05f91532c3f8772d25646844de39a8;hb=0d5a6accc84530d44f35ba4f3a74b370a1f88f86;hp=2549cb1327987267e82d76a160e79323e734f76f;hpb=14e22779625de673569c7b950ecc2753fb915b31;p=coreboot.git

diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 2549cb132..1865a08da 100644
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -5,11 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "southbridge/intel/esb6300/esb6300_early_smbus.c"
@@ -24,9 +20,7 @@
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
-
-#define SIO_GPIO_BASE 0x680
-#define SIO_XBUS_BASE 0x4880
+#include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define HIDDEN_SERIAL_DEV  PNP_DEV(0x2e, W83627HF_SP2)
@@ -40,9 +34,6 @@
 	0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-#define RECVENA_CONFIG  0x0808090a
-#define RECVENB_CONFIG  0x0808090a
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);
@@ -54,31 +45,21 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static void main(unsigned long bist)
 {
-	/*
-	 *
-	 *
-	 */
 	static const struct mem_controller mch[] = {
 		{
 			.node_id = 0,
-			/*
-			.f0 = PCI_DEV(0, 0x00, 0),
-			.f1 = PCI_DEV(0, 0x00, 1),
-			.f2 = PCI_DEV(0, 0x00, 2),
-			.f3 = PCI_DEV(0, 0x00, 3),
-			*/
-			.channel0 = {(0xa<<3)|0, (0xa<<3)|1, (0xa<<3)|2, (0xa<<3)|3, },
-			.channel1 = {(0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, (0xa<<3)|7, },
+			.channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, },
+			.channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, },
 		}
 	};
 
 	if (bist == 0) {
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
-		if (memory_initialized()) {
+		if (memory_initialized())
 			skip_romstage();
-		}
 	}
+
 	/* Setup the console */
 	outb(0x87,0x2e);
 	outb(0x87,0x2e);
@@ -94,16 +75,13 @@ static void main(unsigned long bist)
 	/* config LPC decode for flash memory access */
         device_t dev;
         dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
-        if (dev == PCI_DEV_INVALID) {
+        if (dev == PCI_DEV_INVALID)
                 die("Missing esb6300?");
-        }
         pci_write_config32(dev, 0xe8, 0x00000000);
         pci_write_config8(dev, 0xf0, 0x00);
 
 #if 0
 	display_cpuid_update_microcode();
-#endif
-#if 0
 	print_pci_devices();
 #endif
 #if 1
@@ -112,9 +90,8 @@ static void main(unsigned long bist)
 #if 0
 //	dump_spd_registers(&cpu[0]);
 	int i;
-	for(i = 0; i < 1; i++) {
+	for(i = 0; i < 1; i++)
 		dump_spd_registers();
-	}
 #endif
 	disable_watchdogs();
 //	dump_ipmi_registers();
@@ -122,28 +99,7 @@ static void main(unsigned long bist)
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
 	dump_pci_devices();
-#endif
-#if 0
 	dump_pci_device(PCI_DEV(0, 0x00, 0));
 	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
-
-#if 0 // temporarily disabled
-	/* Check the first 1M */
-//	ram_check(0x00000000, 0x000100000);
-//	ram_check(0x00000000, 0x000a0000);
-	ram_check(0x00100000, 0x01000000);
-	/* check the first 1M in the 3rd Gig */
-	ram_check(0x30100000, 0x31000000);
-#endif
-#if 0
-	ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
-	while(1) {
-		hlt();
-	}
-#endif
 }
-