X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fsiemens%2Fsitemp_g1p1%2Fmptable.c;h=ba2c1e4c1c3d4ae39ac031a50676b22b7aced494;hb=5ff7c13e858a31addf1558731a12cf6c753b576d;hp=0e18fb3d2f5541824751481887db3099c97ea3c6;hpb=4e2d542a64304a108b6ff5175966e78769979594;p=coreboot.git

diff --git a/src/mainboard/siemens/sitemp_g1p1/mptable.c b/src/mainboard/siemens/sitemp_g1p1/mptable.c
index 0e18fb3d2..ba2c1e4c1 100644
--- a/src/mainboard/siemens/sitemp_g1p1/mptable.c
+++ b/src/mainboard/siemens/sitemp_g1p1/mptable.c
@@ -38,7 +38,7 @@ static void *smp_write_config_table(void *v)
 {
 	struct mp_config_table *mc;
 	int isa_bus;
-	
+
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
 	mptable_init(mc, LAPIC_ADDR);
 	smp_write_processors(mc);
@@ -60,6 +60,61 @@ static void *smp_write_config_table(void *v)
 	}
 	mptable_add_isa_interrupts(mc, isa_bus, apicid_sb600, 0);
 
+#define PCI_INT(bus, dev, fn, pin) \
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb600, (pin))
+
+	/* usb */
+	PCI_INT(0x0, 0x13, 0x0, 0x10);
+	PCI_INT(0x0, 0x13, 0x1, 0x11);
+	PCI_INT(0x0, 0x13, 0x2, 0x12);
+	PCI_INT(0x0, 0x13, 0x3, 0x13);
+
+	/* sata */
+	PCI_INT(0x0, 0x12, 0x1, 0x16);
+
+	/* SMBus/ACPI */
+	PCI_INT(0x0, 0x14, 0x0, 0x10);
+	/* IDE */
+	PCI_INT(0x0, 0x14, 0x1, 0x11);
+	/* HDA */
+	PCI_INT(0x0, 0x14, 0x2, 0x12);
+	/* LPC */
+	PCI_INT(0x0, 0x14, 0x3, 0x13);
+
+	/* GFX ? */
+	PCI_INT(bus_rs690[1], 0x5, 0x0, 0x12);
+	PCI_INT(bus_rs690[1], 0x5, 0x1, 0x13);
+
+	/* PCIe slots */
+	PCI_INT(0x2, 0x00, 0x00, 0x10);
+	PCI_INT(0x2, 0x00, 0x01, 0x11);
+	PCI_INT(0x2, 0x00, 0x02, 0x12);
+	PCI_INT(0x2, 0x00, 0x03, 0x13);
+
+	/* PCIe slots */
+	PCI_INT(0x3, 0x00, 0x00, 0x11);
+	PCI_INT(0x3, 0x00, 0x01, 0x12);
+	PCI_INT(0x3, 0x00, 0x02, 0x13);
+	PCI_INT(0x3, 0x00, 0x03, 0x10);
+
+	/* PCIe slots */
+	PCI_INT(0x4, 0x00, 0x00, 0x12);
+	PCI_INT(0x4, 0x00, 0x01, 0x13);
+	PCI_INT(0x4, 0x00, 0x02, 0x10);
+	PCI_INT(0x4, 0x00, 0x03, 0x11);
+
+	/* PCIe slots */
+	PCI_INT(0x5, 0x00, 0x00, 0x13);
+	PCI_INT(0x5, 0x00, 0x01, 0x10);
+	PCI_INT(0x5, 0x00, 0x02, 0x11);
+	PCI_INT(0x5, 0x00, 0x03, 0x12);
+
+	/* onboard NIC ? */
+	PCI_INT(bus_sb600[1], 0x7, 0x0, 0x13);
+	PCI_INT(bus_sb600[1], 0x7, 0x1, 0x10);
+	PCI_INT(bus_sb600[1], 0x7, 0x2, 0x11);
+	PCI_INT(bus_sb600[1], 0x7, 0x3, 0x12);
+
 	/* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 	mptable_lintsrc(mc, isa_bus);