X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fnvidia%2Fl1_2pvv%2FConfig.lb;h=978e88f7954b989584d7b56010d1bad00216f442;hb=0867062412dd4bfe5a556e5f3fd85ba5b682d79b;hp=29725cf8a1ae151b8217bc6754bfab39efd805a6;hpb=9702b6bf7ec5a4fb16934f1cf2724480e2460c89;p=coreboot.git

diff --git a/src/mainboard/nvidia/l1_2pvv/Config.lb b/src/mainboard/nvidia/l1_2pvv/Config.lb
index 29725cf8a..978e88f79 100644
--- a/src/mainboard/nvidia/l1_2pvv/Config.lb
+++ b/src/mainboard/nvidia/l1_2pvv/Config.lb
@@ -19,8 +19,8 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-## XIP_ROM_SIZE must be a power of 2.
-default XIP_ROM_SIZE = 64 * 1024
+## CONFIG_XIP_ROM_SIZE must be a power of 2.
+default CONFIG_XIP_ROM_SIZE = 64 * 1024
 include /config/failovercalculation.lb
 
 arch i386 end
@@ -33,33 +33,33 @@ driver mainboard.o
 #needed by irq_tables and mptable and acpi_tables
 object get_bus_conf.o
 
-if HAVE_MP_TABLE object mptable.o end
-if HAVE_PIRQ_TABLE object irq_tables.o end
+if CONFIG_HAVE_MP_TABLE object mptable.o end
+if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end
 #object reset.o
 
-if HAVE_ACPI_TABLES
+if CONFIG_HAVE_ACPI_TABLES
 	object acpi_tables.o
 	object fadt.o
 	makerule dsdt.c
-		depends "$(MAINBOARD)/dx/dsdt_lb.dsl"
-		action  "/usr/sbin/iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl"
+		depends "$(CONFIG_MAINBOARD)/dx/dsdt_lb.dsl"
+		action  "/usr/sbin/iasl -tc $(CONFIG_MAINBOARD)/dx/dsdt_lb.dsl"
 		action  "mv dsdt_lb.hex dsdt.c"
 	end
 	object ./dsdt.o
 
 	#./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
 
-	if ACPI_SSDTX_NUM
+	if CONFIG_ACPI_SSDTX_NUM
 	    makerule ssdt6.c
-			depends "$(MAINBOARD)/dx/pci6.asl"
-			action  "/usr/sbin/iasl -tc $(MAINBOARD)/dx/pci6.asl"
+			depends "$(CONFIG_MAINBOARD)/dx/pci6.asl"
+			action  "/usr/sbin/iasl -tc $(CONFIG_MAINBOARD)/dx/pci6.asl"
 			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt6/g' pci6.hex"
 			action  "mv pci6.hex ssdt6.c"
 	    end
 	    object ./ssdt6.o
 	    makerule ssdt5.c
-			depends "$(MAINBOARD)/dx/pci5.asl"
-			action  "/usr/sbin/iasl -tc $(MAINBOARD)/dx/pci5.asl"
+			depends "$(CONFIG_MAINBOARD)/dx/pci5.asl"
+			action  "/usr/sbin/iasl -tc $(CONFIG_MAINBOARD)/dx/pci5.asl"
 			action  "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
 			action  "mv pci5.hex ssdt5.c"
 	    end
@@ -69,24 +69,24 @@ end
 
 	if CONFIG_USE_INIT
 		makerule ./cache_as_ram_auto.o
-			depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-			action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(MAINBOARD)/cache_as_ram_auto.c -o $@"
+			depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+			action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
 		end
 	else
 		makerule ./cache_as_ram_auto.inc
-			depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-			action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(MAINBOARD)/cache_as_ram_auto.c -o $@"
+			depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+			action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
 			action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
 			action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
 		end
 	end
 
-if USE_FAILOVER_IMAGE
+if CONFIG_USE_FAILOVER_IMAGE
 else
     if CONFIG_AP_CODE_IN_CAR
 	makerule ./apc_auto.o
-		depends "$(MAINBOARD)/apc_auto.c option_table.h"
-		action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(MAINBOARD)/apc_auto.c -o $@"
+		depends "$(CONFIG_MAINBOARD)/apc_auto.c option_table.h"
+		action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/apc_auto.c -o $@"
 	end
 	ldscript /arch/i386/init/ldscript_apc.lb
     end
@@ -96,13 +96,13 @@ end
 ##
 ## Build our 16 bit and 32 bit coreboot entry code
 ##
-if HAVE_FAILOVER_BOOT
-    if USE_FAILOVER_IMAGE
+if CONFIG_HAVE_FAILOVER_BOOT
+    if CONFIG_USE_FAILOVER_IMAGE
 	mainboardinit cpu/x86/16bit/entry16.inc
 	ldscript /cpu/x86/16bit/entry16.lds
     end
 else
-    if USE_FALLBACK_IMAGE
+    if CONFIG_USE_FALLBACK_IMAGE
 	mainboardinit cpu/x86/16bit/entry16.inc
 	ldscript /cpu/x86/16bit/entry16.lds
     end
@@ -121,8 +121,8 @@ mainboardinit cpu/x86/32bit/entry32.inc
 ##
 ## Build our reset vector (This is where coreboot is entered)
 ##
-if HAVE_FAILOVER_BOOT
-    if USE_FAILOVER_IMAGE
+if CONFIG_HAVE_FAILOVER_BOOT
+    if CONFIG_USE_FAILOVER_IMAGE
 	mainboardinit cpu/x86/16bit/reset16.inc
 	ldscript /cpu/x86/16bit/reset16.lds
     else
@@ -130,7 +130,7 @@ if HAVE_FAILOVER_BOOT
 	ldscript /cpu/x86/32bit/reset32.lds
     end
 else
-    if USE_FALLBACK_IMAGE
+    if CONFIG_USE_FALLBACK_IMAGE
 	mainboardinit cpu/x86/16bit/reset16.inc
 	ldscript /cpu/x86/16bit/reset16.lds
     else
@@ -148,13 +148,13 @@ ldscript /southbridge/nvidia/mcp55/id.lds
 ##
 ## ROMSTRAP table for MCP55
 ##
-if HAVE_FAILOVER_BOOT
-    if USE_FAILOVER_IMAGE
+if CONFIG_HAVE_FAILOVER_BOOT
+    if CONFIG_USE_FAILOVER_IMAGE
 	mainboardinit southbridge/nvidia/mcp55/romstrap.inc
 	ldscript /southbridge/nvidia/mcp55/romstrap.lds
     end
 else
-    if USE_FALLBACK_IMAGE
+    if CONFIG_USE_FALLBACK_IMAGE
 	mainboardinit southbridge/nvidia/mcp55/romstrap.inc
 	ldscript /southbridge/nvidia/mcp55/romstrap.lds
     end
@@ -170,12 +170,12 @@ end
 ### Things are delicate and we test to see if we should
 ### failover to another image.
 ###
-if HAVE_FAILOVER_BOOT
-    if USE_FAILOVER_IMAGE
+if CONFIG_HAVE_FAILOVER_BOOT
+    if CONFIG_USE_FAILOVER_IMAGE
 		ldscript /arch/i386/lib/failover_failover.lds
     end
 else
-    if USE_FALLBACK_IMAGE
+    if CONFIG_USE_FALLBACK_IMAGE
 		ldscript /arch/i386/lib/failover.lds
     end
 end