X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fnewisys%2Fkhepri%2Fromstage.c;h=984aa9da5430f496bd319369e64394c25627c46b;hb=6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23;hp=84ece3897d0abaa87ec967ee291fdf42eb4d6204;hpb=86a571797d9ede9d79edcfdce38f50a80b9a49f9;p=coreboot.git diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index 84ece3897..984aa9da5 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -93,11 +94,11 @@ static inline int spd_read_byte(unsigned device, unsigned address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - (0xa<<3)|0, (0xa<<3)|2, 0, 0, - (0xa<<3)|1, (0xa<<3)|3, 0, 0, + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, #if CONFIG_MAX_PHYSICAL_CPUS > 1 - (0xa<<3)|4, (0xa<<3)|6, 0, 0, - (0xa<<3)|5, (0xa<<3)|7, 0, 0, + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, #endif };