X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fnewisys%2Fkhepri%2Fromstage.c;h=11e1ecfe3ebf43bf0fffa11958e1cddbf4e42645;hb=57b2ff886e0ce2c92820f5722c8031def3ac94cf;hp=984aa9da5430f496bd319369e64394c25627c46b;hpb=5244e1ba63e5f3ea12066734bfb0d864a8f1f11d;p=coreboot.git diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index 984aa9da5..11e1ecfe3 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -15,29 +15,23 @@ #include #include #include - #include - #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" - #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" - #include "northbridge/amd/amdk8/setup_resource_map.c" +#include "southbridge/amd/amd8111/amd8111_early_ctrl.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -#include "southbridge/amd/amd8111/amd8111_early_ctrl.c" - static void memreset_setup(void) { if (is_cpu_pre_c0()) { @@ -72,22 +66,13 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } - #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" - - /* newisys khepri does not want the default */ -#include "resourcemap.c" - +#include "resourcemap.c" /* newisys khepri does not want the default */ #include "cpu/amd/dualcore/dualcore.c" - - - #include "cpu/amd/car/post_cache_as_ram.c" - #include "cpu/amd/model_fxx/init_cpus.c" - #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" @@ -171,6 +156,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif post_cache_as_ram(); - } -