X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fmsi%2Fms6156%2Fromstage.c;h=630f313b1b7290167dcb2307db14e1d04038c806;hb=115c5b982495f8495968e0ea4fd77f63df6e5d71;hp=10ec2cc7683a142443f44317e1bcff798651f6dc;hpb=12584e2bd2ec7ab1ed60dc524574c8ae04dc17d6;p=coreboot.git diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c index 10ec2cc76..630f313b1 100644 --- a/src/mainboard/msi/ms6156/romstage.c +++ b/src/mainboard/msi/ms6156/romstage.c @@ -25,47 +25,35 @@ #include #include #include -#include "pc80/serial.c" #include -#include "lib/ramtest.c" -#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" -#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" +#include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" -#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "superio/winbond/w83977tf/w83977tf_early_serial.c" +#include #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -static inline int spd_read_byte(unsigned int device, unsigned int address) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); + +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); } -#include "northbridge/intel/i440bx/raminit.c" -#include "northbridge/intel/i440bx/debug.c" - -static void main(unsigned long bist) +void main(unsigned long bist) { - if (bist == 0) - early_mtrr_init(); - w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); report_bist_failure(bist); - /* Enable access to the full ROM chip, needed very early by CBFS. */ - i82371eb_enable_rom(PCI_DEV(0, 7, 0)); /* ISA bridge is 00:07.0. */ - enable_smbus(); - /* dump_spd_registers(); */ + dump_spd_registers(); sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } -