X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fmotorola%2Fsandpointx3_altimus_mpc7410%2FOptions.lb;fp=src%2Fmainboard%2Fmotorola%2Fsandpointx3_altimus_mpc7410%2FOptions.lb;h=1a47974bf87b6c5518a86e2ba2859f2696b13c86;hb=0867062412dd4bfe5a556e5f3fd85ba5b682d79b;hp=42b183f9165277596bebfc21ae0df5afcdb548e5;hpb=9702b6bf7ec5a4fb16934f1cf2724480e2460c89;p=coreboot.git

diff --git a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb
index 42b183f91..1a47974bf 100644
--- a/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb
+++ b/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb
@@ -1,22 +1,22 @@
-uses ISA_IO_BASE
+uses CONFIG_ISA_IO_BASE
 uses CONFIG_CBFS
-uses ISA_MEM_BASE
-uses PCIC0_CFGADDR
-uses PCIC0_CFGDATA
-uses PNP_CFGADDR
-uses PNP_CFGDATA
-uses _IO_BASE
-
-uses CROSS_COMPILE 
-uses HAVE_OPTION_TABLE
+uses CONFIG_ISA_MEM_BASE
+uses CONFIG_PCIC0_CFGADDR
+uses CONFIG_PCIC0_CFGDATA
+uses CONFIG_PNP_CFGADDR
+uses CONFIG_PNP_CFGDATA
+uses CONFIG_IO_BASE
+
+uses CONFIG_CROSS_COMPILE 
+uses CONFIG_HAVE_OPTION_TABLE
 uses CONFIG_SANDPOINT_ALTIMUS 
 uses CONFIG_COMPRESS 
-uses DEFAULT_CONSOLE_LOGLEVEL 
+uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL 
 uses CONFIG_USE_INIT
 uses CONFIG_CHIP_CONFIGURE
-uses NO_POST
+uses CONFIG_NO_POST
 uses CONFIG_CONSOLE_SERIAL8250 
-uses TTYS0_BASE 
+uses CONFIG_TTYS0_BASE 
 uses CONFIG_IDE
 uses CONFIG_FS_PAYLOAD 
 uses CONFIG_FS_EXT2
@@ -24,47 +24,47 @@ uses CONFIG_FS_ISO9660
 uses CONFIG_FS_FAT
 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
 uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses AUTOBOOT_CMDLINE
-uses PAYLOAD_SIZE
-uses ROM_SIZE
-uses ROM_IMAGE_SIZE
-uses _RESET
-uses _EXCEPTION_VECTORS
-uses _ROMBASE
-uses _ROMSTART
-uses _RAMBASE
-uses _RAMSTART
-uses STACK_SIZE
-uses HEAP_SIZE
-
-uses MAINBOARD
-uses MAINBOARD_VENDOR
-uses MAINBOARD_PART_NUMBER
+uses CONFIG_AUTOBOOT_CMDLINE
+uses CONFIG_PAYLOAD_SIZE
+uses CONFIG_ROM_SIZE
+uses CONFIG_ROM_IMAGE_SIZE
+uses CONFIG_RESET
+uses CONFIG_EXCEPTION_VECTORS
+uses CONFIG_ROMBASE
+uses CONFIG_ROMSTART
+uses CONFIG_RAMBASE
+uses CONFIG_RAMSTART
+uses CONFIG_STACK_SIZE
+uses CONFIG_HEAP_SIZE
+
+uses CONFIG_MAINBOARD
+uses CONFIG_MAINBOARD_VENDOR
+uses CONFIG_MAINBOARD_PART_NUMBER
 uses COREBOOT_EXTRA_VERSION
-uses CROSS_COMPILE
+uses CONFIG_CROSS_COMPILE
 uses CC
-uses HOSTCC
-uses OBJCOPY
+uses CONFIG_HOSTCC
+uses CONFIG_OBJCOPY
 
 ##
 ## Set memory map
 ##
-default ISA_IO_BASE=0xfe000000
-default ISA_MEM_BASE=0xfd000000
-default PCIC0_CFGADDR=0xfec00000
-default PCIC0_CFGDATA=0xfee00000
-default PNP_CFGADDR=0x15c
-default PNP_CFGDATA=0x15d
-default _IO_BASE=ISA_IO_BASE
+default CONFIG_ISA_IO_BASE=0xfe000000
+default CONFIG_ISA_MEM_BASE=0xfd000000
+default CONFIG_PCIC0_CFGADDR=0xfec00000
+default CONFIG_PCIC0_CFGDATA=0xfee00000
+default CONFIG_PNP_CFGADDR=0x15c
+default CONFIG_PNP_CFGDATA=0x15d
+default CONFIG_IO_BASE=CONFIG_ISA_IO_BASE
 
 ##
 ## The default compiler
 ##
-default CC="$(CROSS_COMPILE)gcc"
-default HOSTCC="gcc"
+default CC="$(CONFIG_CROSS_COMPILE)gcc"
+default CONFIG_HOSTCC="gcc"
 ## use a cross compiler
-#default CROSS_COMPILE="powerpc-eabi-"
-#default CROSS_COMPILE="ppc_74xx-"
+#default CONFIG_CROSS_COMPILE="powerpc-eabi-"
+#default CONFIG_CROSS_COMPILE="ppc_74xx-"
 
 ## Use stage 1 initialization code
 default CONFIG_USE_INIT=1
@@ -76,12 +76,12 @@ default CONFIG_CHIP_CONFIGURE=1
 default CONFIG_COMPRESS=0
 
 ## Turn off POST codes
-default NO_POST=1
+default CONFIG_NO_POST=1
 
 ## Enable serial console
-default DEFAULT_CONSOLE_LOGLEVEL=8
+default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
 default CONFIG_CONSOLE_SERIAL8250=1
-default TTYS0_BASE=0x3f8
+default CONFIG_TTYS0_BASE=0x3f8
 
 ## Load payload using filo
 default CONFIG_IDE=1
@@ -89,34 +89,34 @@ default CONFIG_FS_PAYLOAD=1
 default CONFIG_FS_EXT2=1
 default CONFIG_FS_ISO9660=1
 default CONFIG_FS_FAT=1
-default AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
+default CONFIG_AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
 
 # coreboot must fit into 128KB
-default ROM_IMAGE_SIZE=131072
-default ROM_SIZE={ROM_IMAGE_SIZE+PAYLOAD_SIZE}
-default PAYLOAD_SIZE=262144
+default CONFIG_ROM_IMAGE_SIZE=131072
+default CONFIG_ROM_SIZE={CONFIG_ROM_IMAGE_SIZE+CONFIG_PAYLOAD_SIZE}
+default CONFIG_PAYLOAD_SIZE=262144
 
 # Set stack and heap sizes (stage 2)
-default STACK_SIZE=0x10000
-default HEAP_SIZE=0x10000
+default CONFIG_STACK_SIZE=0x10000
+default CONFIG_HEAP_SIZE=0x10000
 
 # Sandpoint Demo Board
 ## Base of ROM
-default _ROMBASE=0xfff00000
+default CONFIG_ROMBASE=0xfff00000
 
 ## Sandpoint reset vector
-default _RESET=_ROMBASE+0x100
+default CONFIG_RESET=CONFIG_ROMBASE+0x100
 
 ## Exception vectors (other than reset vector)
-default _EXCEPTION_VECTORS=_RESET+0x100
+default CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
 
 ## Start of coreboot in the boot rom
-## = _RESET + exeception vector table size
-default _ROMSTART=_RESET+0x3100
+## = CONFIG_RESET + exeception vector table size
+default CONFIG_ROMSTART=CONFIG_RESET+0x3100
 
 ## Coreboot C code runs at this location in RAM
-default _RAMBASE=0x00100000
-default _RAMSTART=0x00100000
+default CONFIG_RAMBASE=0x00100000
+default CONFIG_RAMSTART=0x00100000
 
 ### End Options.lb
 #