X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fintel%2Fxe7501devkit%2FOptions.lb;h=2f5a71d04c96de025c8f0d986a4e29eab93f71cb;hb=f8ee1806ac524bc782c93eccc59ee3c929abddb9;hp=0595fe28e576951fc57063bddda5fb3bf2f44028;hpb=7e61e45402aba2b90997f4f02ca8266cf65a229a;p=coreboot.git

diff --git a/src/mainboard/intel/xe7501devkit/Options.lb b/src/mainboard/intel/xe7501devkit/Options.lb
index 0595fe28e..2f5a71d04 100644
--- a/src/mainboard/intel/xe7501devkit/Options.lb
+++ b/src/mainboard/intel/xe7501devkit/Options.lb
@@ -55,7 +55,7 @@ uses USE_FALLBACK_IMAGE
 uses ROM_SIZE
 uses ROM_IMAGE_SIZE
 uses FALLBACK_SIZE
-uses LINUXBIOS_EXTRA_VERSION
+uses COREBOOT_EXTRA_VERSION
 
 ## These are defined in mainboard Config.lb, don't add here
 uses ROM_SECTION_SIZE
@@ -143,7 +143,7 @@ default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x8086
 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2480
 
 ###
-### LinuxBIOS layout values
+### coreboot layout values
 ###
 
 ##
@@ -162,7 +162,7 @@ default HEAP_SIZE=0x4000
 default USE_OPTION_TABLE = 0
 
 ##
-## LinuxBIOS C code runs at this location in RAM
+## Coreboot C code runs at this location in RAM
 ##
 default _RAMBASE=0x00004000
 
@@ -211,7 +211,7 @@ default TTYS0_BASE=0x3f8
 default TTYS0_LCS=0x3
 
 ##
-### Select the linuxBIOS loglevel
+### Select the coreboot loglevel
 ##
 ## EMERG      1   system is unusable               
 ## ALERT      2   action must be taken immediately