X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fintel%2Fjarrell%2Fromstage.c;h=5d33b10633841b5b8aa0c7831a1310b04fda2775;hb=7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32;hp=0220ec8faba5cdb48321af96cd33bc3d7b689141;hpb=6f56ad2d2ef6fbf9564123c5a9b64f05d006b2d7;p=coreboot.git

diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 0220ec8fa..5d33b1063 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -19,6 +19,7 @@
 #include "superio/nsc/pc87427/pc87427_early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
+#include <spd.h>
 
 #define SIO_GPIO_BASE 0x680
 #define SIO_XBUS_BASE 0x4880
@@ -29,8 +30,6 @@
 #define DEVPRES_CONFIG  (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D6F0)
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-#define DIMM_MAP_LOGICAL 0x0124
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);
@@ -43,31 +42,21 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static void main(unsigned long bist)
 {
-	/*
-	 *
-	 *
-	 */
 	static const struct mem_controller mch[] = {
 		{
 			.node_id = 0,
-			/*
-			.f0 = PCI_DEV(0, 0x00, 0),
-			.f1 = PCI_DEV(0, 0x00, 1),
-			.f2 = PCI_DEV(0, 0x00, 2),
-			.f3 = PCI_DEV(0, 0x00, 3),
-			*/
-			.channel0 = { (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, 0 },
-			.channel1 = { (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, 0 },
+			.channel0 = { DIMM2, DIMM1, DIMM0, 0 },
+			.channel1 = { DIMM6, DIMM5, DIMM4, 0 },
 		}
 	};
 
 	if (bist == 0) {
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
-		if (memory_initialized()) {
+		if (memory_initialized())
 			skip_romstage();
-		}
 	}
+
 	/* Setup the console */
 	pc87427_disable_dev(CONSOLE_SERIAL_DEV);
 	pc87427_disable_dev(HIDDEN_SERIAL_DEV);
@@ -90,9 +79,8 @@ static void main(unsigned long bist)
 	/* config LPC decode for flash memory access */
         device_t dev;
         dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
-        if (dev == PCI_DEV_INVALID) {
+        if (dev == PCI_DEV_INVALID)
                 die("Missing ich5?");
-        }
         pci_write_config32(dev, 0xe8, 0x00000000);
         pci_write_config8(dev, 0xf0, 0x00);
 
@@ -103,9 +91,8 @@ static void main(unsigned long bist)
 #if 0
 //	dump_spd_registers(&cpu[0]);
 	int i;
-	for(i = 0; i < 1; i++) {
+	for(i = 0; i < 1; i++)
 		dump_spd_registers();
-	}
 #endif
 	disable_watchdogs();
 	power_down_reset_check();
@@ -115,8 +102,6 @@ static void main(unsigned long bist)
 	ich5_watchdog_on();
 #if 0
 	dump_pci_devices();
-#endif
-#if 0
 	dump_pci_device(PCI_DEV(0, 0x00, 0));
 	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
@@ -132,11 +117,5 @@ static void main(unsigned long bist)
 	ram_check(0x00000000, 0x02000000);
 #endif
 
-#endif
-#if 0
-	while(1) {
-		hlt();
-	}
 #endif
 }
-