X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fiei%2Fnova4899r%2Fromstage.c;h=1d991972937df06313c0ff339f7aa3f73aedc5ed;hb=0d5a6accc84530d44f35ba4f3a74b370a1f88f86;hp=0b15c3f40bba3d1df0c52c1b85ffb30f202c679e;hpb=38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0;p=coreboot.git

diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c
index 0b15c3f40..1d9919729 100644
--- a/src/mainboard/iei/nova4899r/romstage.c
+++ b/src/mainboard/iei/nova4899r/romstage.c
@@ -18,18 +18,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define ASSEMBLY 1
-#define __PRE_RAM__
-
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
 #include "southbridge/amd/cs5530/cs5530_enable_rom.c"
 #include "cpu/x86/bist.h"
@@ -40,19 +35,10 @@
 
 static void main(unsigned long bist)
 {
-	/* Initialize the serial console. */
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
 	console_init();
-
-	/* Halt if there was a built in self test failure. */
 	report_bist_failure(bist);
-
 	cs5530_enable_rom();
-
-	/* Initialize RAM. */
 	sdram_init();
-
-	/* Check RAM. */
-	/* ram_check(0x00000000, 640 * 1024); */
 }