X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fgigabyte%2Fm57sli%2Fromstage.c;h=968e384021666f853fc742236a5f14e83f50f309;hb=7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32;hp=c9599094abdd69a5d6686b329a85ebd19eff3a27;hpb=57b2ff886e0ce2c92820f5722c8031def3ac94cf;p=coreboot.git diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index c9599094a..968e38402 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -53,14 +53,8 @@ #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8716F_GPIO) -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { @@ -111,17 +105,16 @@ static void sio_setup(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - // Node 0 - DIMM0, DIMM2, 0, 0, - DIMM1, DIMM3, 0, 0, - // Node 1 - DIMM4, DIMM6, 0, 0, - DIMM5, DIMM7, 0, 0, + // Node 0 + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, + // Node 1 + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, }; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - int needs_reset = 0; unsigned bsp_apicid = 0; uint8_t tmp = 0; @@ -129,18 +122,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ - enumerate_ht_chain(); - sio_setup(); - - /* Setup the mcp55 */ mcp55_enable_rom(); } - if (bist == 0) { + if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); - } pnp_enter_ext_func_mode(SERIAL_DEV); /* The following line will set CLKIN to 24 MHz, external */ @@ -153,9 +141,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Set Serial Flash interface to 0x0820 */ pnp_write_config(GPIO_DEV, 0x64, 0x08); pnp_write_config(GPIO_DEV, 0x65, 0x20); - /* We can get away with not resetting the logical device because - * it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE) will do that. - */ } it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE); pnp_exit_ext_func_mode(SERIAL_DEV); @@ -200,21 +185,15 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr_t msr; msr=rdmsr(0xc0010042); print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); - } - enable_fid_change(); - enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); - init_fidvid_bsp(bsp_apicid); - // show final fid and vid { msr_t msr; msr=rdmsr(0xc0010042); print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); - } #endif