X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fdigitallogic%2Fmsm800sev%2Fromstage.c;h=4429914d7461e5d6401c533498e2ceb8734fd7f6;hb=0d5a6accc84530d44f35ba4f3a74b370a1f88f86;hp=14f04941f79104300f6bbeae1495ef3f99268862;hpb=7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32;p=coreboot.git

diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index 14f04941f..4429914d7 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -66,9 +66,6 @@ void main(unsigned long bist)
 
 	sdram_initialize(1, memctrl);
 
-	/* Check all of memory */
-	ram_check(0x00000000, 640*1024);
-
 	/* Switch from Cache as RAM to real RAM */
 	/* There are two ways we could think about this.
 	 1. If we are using the romstage.inc ROMCC way, the stack is going to be re-setup in the code following this code.