X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Fasrock%2F939a785gmh%2Fromstage.c;h=0bf20b654455409f91027fb28d1f2e70568845c8;hb=57b2ff886e0ce2c92820f5722c8031def3ac94cf;hp=7fb3227661f6145f8ae2749101c9ad01c6679ac9;hpb=5244e1ba63e5f3ea12066734bfb0d864a8f1f11d;p=coreboot.git

diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 7fb322766..0bf20b654 100644
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -32,23 +32,18 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 #include <spd.h>
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"
 #include <usbdebug.h>
-
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
-
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-
 #include "southbridge/amd/rs780/rs780_early_setup.c"
 #include "southbridge/amd/sb700/sb700_early_setup.c"
 #include "northbridge/amd/amdk8/debug.c" /* After sb700_early_setup.c! */
@@ -79,16 +74,10 @@ static inline int spd_read_byte(u32 device, u32 address)
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
-
 #include "cpu/amd/dualcore/dualcore.c"
-
-
 #include "cpu/amd/car/post_cache_as_ram.c"
-
 #include "cpu/amd/model_fxx/init_cpus.c"
-
 #include "cpu/amd/model_fxx/fidvid.c"
-
 #include "northbridge/amd/amdk8/early_ht.c"
 
 static void sio_init(void)
@@ -106,7 +95,6 @@ static void sio_init(void)
 	pnp_write_config(GPIO2345_DEV, 0x2c, 0x1);
 	pnp_write_config(GPIO2345_DEV, 0x2d, 0x1);
 
-
 //idx 30 e0 e1 e2 e3 e4 e5 e6  e7 e8 e9 f0 f1 f2 f3 f4  f5 f6 f7 fe
 //val 07 XX XX XX f6 0e 00 00  00 00 ff d6 96 00 40 d0  83 00 00 07
 
@@ -240,4 +228,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_cache_as_ram();
 }
-