X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Famd%2Fserengeti_cheetah_fam10%2FKconfig;h=feecdec4ef005e3d52982f375d4d7c6dcea986ce;hb=a31bb0779ae5fc932f458cb82126bc87002c83b2;hp=075ef91fd3d7563692641d2d4c13dcc0e681f157;hpb=9ea7bff22ecaba50eefd817dd74d092120682f1a;p=coreboot.git diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig index 075ef91fd..feecdec4e 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig @@ -1,140 +1,90 @@ -config BOARD_AMD_SERENGETI_CHEETAH_FAM10 - bool "Serengeti Cheetah (Fam10)" +if BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y select ARCH_X86 select CPU_AMD_SOCKET_F_1207 + select DIMM_DDR2 + select DIMM_REGISTERED select NORTHBRIDGE_AMD_AMDFAM10 - select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX select SOUTHBRIDGE_AMD_AMD8111 select SOUTHBRIDGE_AMD_AMD8132 select SUPERIO_WINBOND_W83627HF select BOARD_HAS_FADT select HAVE_BUS_CONFIG + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE - select USE_PRINTK_IN_CAR - select USE_DCACHE_RAM select HAVE_HARD_RESET select SB_HT_CHAIN_UNITID_OFFSET_ONLY select SERIAL_CPU_INIT select AMDMCT select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_1024 + select RAMINIT_SYSINFO select ENABLE_APIC_EXT_ID select LIFT_BSP_APIC_ID - select TINY_BOOTBLOCK + select QRANK_DIMM_SUPPORT config MAINBOARD_DIR string default amd/serengeti_cheetah_fam10 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config APIC_ID_OFFSET hex default 0x0 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config LB_CKS_RANGE_END - int - default 122 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config LB_CKS_LOC - int - default 123 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config MAINBOARD_PART_NUMBER string default "Serengeti Cheetah (Fam10)" - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config HW_MEM_HOLE_SIZEK - hex - default 0x100000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 # 6 * MAX_PHYSICAL_CPUS config MAX_CPUS int default 48 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config MAX_PHYSICAL_CPUS int default 8 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config HW_MEM_HOLE_SIZE_AUTO_INC - bool - default n - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config MEM_TRAIN_SEQ int default 2 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config SB_HT_CHAIN_ON_BUS0 int default 2 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config HT_CHAIN_END_UNITID_BASE hex default 0x6 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config HT_CHAIN_UNITID_BASE hex default 0xa - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config USE_INIT - bool - default n - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config IRQ_SLOT_COUNT int default 11 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config AMD_UCODE_PATCH_FILE string default "mc_patch_01000095.h" - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config RAMTOP hex default 0x1000000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config HEAP_SIZE hex default 0xc0000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 config ACPI_SSDTX_NUM int - default 31 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2b80 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + default 5 config RAMBASE hex default 0x200000 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 -config ID_SECTION_OFFSET - hex - default 0x80 - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 +endif # BOARD_AMD_SERENGETI_CHEETAH_FAM10