X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fmainboard%2Famd%2Fdbm690t%2Fromstage.c;h=88ecd941efa738700e926c3581380fac72293237;hb=7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32;hp=da1427a7f575c0e9e724683b794c449012c860b9;hpb=e5b7507882d4ee042d9c4d03e2e763bb49774b43;p=coreboot.git

diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c
index da1427a7f..88ecd941e 100644
--- a/src/mainboard/amd/dbm690t/romstage.c
+++ b/src/mainboard/amd/dbm690t/romstage.c
@@ -17,18 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define SET_FIDVID 1
-#define QRANK_DIMM_SUPPORT 1
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
 #define RC0 (6<<8)
 #define RC1 (7<<8)
 
-#define DIMM0 0x50
-#define DIMM1 0x51
-
 #define SMBUS_HUB 0x71
 
 #include <stdint.h>
@@ -40,38 +31,25 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"
-
+#include <spd.h>
 #include <usbdebug.h>
-
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
-
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-
 #include "southbridge/amd/rs690/rs690_early_setup.c"
 #include "southbridge/amd/sb600/sb600_early_setup.c"
 #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
 
-/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-}
-
-/* called in raminit_f.c */
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-}
+static void memreset(int controllers, const struct mem_controller *ctrl) { }
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
 
-/*called in raminit_f.c */
 static inline int spd_read_byte(u32 device, u32 address)
 {
 	return smbus_read_byte(device, address);
@@ -83,16 +61,10 @@ static inline int spd_read_byte(u32 device, u32 address)
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
-
 #include "cpu/amd/dualcore/dualcore.c"
-
-
 #include "cpu/amd/car/post_cache_as_ram.c"
-
 #include "cpu/amd/model_fxx/init_cpus.c"
-
 #include "cpu/amd/model_fxx/fidvid.c"
-
 #include "northbridge/amd/amdk8/early_ht.c"
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -108,14 +80,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();
-
 		/* sb600_lpc_port80(); */
 		sb600_pci_port80();
 	}
 
-	if (bist == 0) {
+	if (bist == 0)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
-	}
 
 	enable_rs690_dev8();
 	sb600_lpc_init();
@@ -155,8 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	/* Check to see if processor is capable of changing FIDVID  */
 	/* otherwise it will throw a GP# when reading FIDVID_STATUS */
 	cpuid1 = cpuid(0x80000007);
-	if( (cpuid1.edx & 0x6) == 0x6 ) {
-
+	if ((cpuid1.edx & 0x6) == 0x6) {
 		/* Read FIDVID_STATUS */
 		msr=rdmsr(0xc0010042);
 		printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
@@ -168,7 +137,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		/* show final fid and vid */
 		msr=rdmsr(0xc0010042);
 		printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
-
 	} else {
 		printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
 	}
@@ -196,4 +164,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_cache_as_ram();
 }
-