X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fdevices%2Fpci_device.c;h=c0559956b39e94a196ee79b7000202ada316fbfb;hb=2143d3737553b293923ad566ef4cda3aec742f75;hp=ed066900e40fe2311cd52a63164dc9f665e86ad1;hpb=abc0c8551604933ca54e9eaa48c3f00e4915dc90;p=coreboot.git

diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index ed066900e..c0559956b 100644
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -48,10 +48,15 @@
 #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1
 #include <device/cardbus.h>
 #endif
-#define CONFIG_PC80_SYSTEM 1
 #if CONFIG_PC80_SYSTEM == 1
 #include <pc80/i8259.h>
 #endif
+#if CONFIG_HAVE_ACPI_RESUME && !CONFIG_S3_VGA_ROM_RUN
+#include <arch/acpi.h>
+#endif
+#if CONFIG_CHROMEOS
+#include <vendorcode/google/chromeos/chromeos.h>
+#endif
 
 u8 pci_moving_config8(struct device *dev, unsigned int reg)
 {
@@ -595,12 +600,11 @@ void pci_dev_enable_resources(struct device *dev)
 	/* Set the subsystem vendor and device ID for mainboard devices. */
 	ops = ops_pci(dev);
 	if (dev->on_mainboard && ops && ops->set_subsystem) {
-		printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", dev_path(dev),
-		       CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
-		       CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
-		ops->set_subsystem(dev,
-				   CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
-				   CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
+		printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n",
+			dev_path(dev), dev->subsystem_vendor,
+			dev->subsystem_device);
+		ops->set_subsystem(dev, dev->subsystem_vendor,
+			dev->subsystem_device);
 	}
 	command = pci_read_config16(dev, PCI_COMMAND);
 	command |= dev->command;
@@ -666,6 +670,15 @@ void pci_dev_init(struct device *dev)
 	    ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA))
 		return;
 
+#if CONFIG_CHROMEOS
+	/* In ChromeOS we want to boot blazingly fast. Therefore
+	 * we don't run (VGA) option ROMs, unless we have to print
+	 * something on the screen before the kernel is loaded.
+	 */
+	if (!developer_mode_enabled() && !recovery_mode_enabled())
+		return;
+#endif
+
 	rom = pci_rom_probe(dev);
 	if (rom == NULL)
 		return;
@@ -674,6 +687,14 @@ void pci_dev_init(struct device *dev)
 	if (ram == NULL)
 		return;
 
+#if CONFIG_HAVE_ACPI_RESUME && !CONFIG_S3_VGA_ROM_RUN
+	/* If S3_VGA_ROM_RUN is disabled, skip running VGA option
+	 * ROMs when coming out of an S3 resume.
+	 */
+	if ((acpi_slp_type == 3) &&
+		((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA))
+		return;
+#endif
 	run_bios(dev, (unsigned long)ram);
 #endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */
 }
@@ -1262,9 +1283,11 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
 		printk(BIOS_DEBUG, "  Readback = %d\n", irq);
 #endif
 
+#if CONFIG_PC80_SYSTEM == 1
 		/* Change to level triggered. */
 		i8259_configure_irq_trigger(pIntAtoD[line - 1],
 					    IRQ_LEVEL_TRIGGERED);
+#endif
 	}
 }
 #endif