X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fcpu%2Fintel%2Fmodel_6xx%2Fmodel_6xx_init.c;h=5b8dd3519bce1bb22a330e134366ae215415c341;hb=554c052b48ac0b36503cb41b1c054a5ead7ae4b4;hp=712cd0508dc4f51dcdb004fd60627929ea8ad00a;hpb=e5b7507882d4ee042d9c4d03e2e763bb49774b43;p=coreboot.git

diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index 712cd0508..5b8dd3519 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -9,7 +8,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static uint32_t microcode_updates[] = {
 	/* WARNING - Intel has a new data structure that has variable length
@@ -33,7 +31,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_6xx_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */