X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fcpu%2Famd%2Fmodel_10xxx%2Fmodel_10xxx_init.c;h=2e8bbfe09dcba7e163216ea05b39a386e46390d1;hb=b5b3b3bf8ca3eb5be974b50c05e60d03432173d7;hp=a92852f521322766be3684a69a35646f91f4ec8d;hpb=a68555f48d06b4c8d55f7e4ca208805bec3d5512;p=coreboot.git

diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index a92852f52..2e8bbfe09 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -24,6 +24,7 @@
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/x86/msr.h>
+#include <cpu/x86/smm.h>
 #include <cpu/x86/pae.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
@@ -118,7 +119,17 @@ static void model_10xxx_init(device_t dev)
 	msr.hi &= ~(1 << (35-32));
 	wrmsr(BU_CFG2_MSR, msr);
 
-	/* Write protect SMM space with SMMLOCK. */
+	/* Set SMM base address for this CPU */
+	msr = rdmsr(SMM_BASE_MSR);
+	msr.lo = SMM_BASE - (lapicid() * 0x400);
+	wrmsr(SMM_BASE_MSR, msr);
+
+	/* Enable the SMM memory window */
+	msr = rdmsr(SMM_MASK_MSR);
+	msr.lo |= (1 << 0); /* Enable ASEG SMRAM Range */
+	wrmsr(SMM_MASK_MSR, msr);
+
+	/* Set SMMLOCK to avoid exploits messing with SMM */
 	msr = rdmsr(HWCR_MSR);
 	msr.lo |= (1 << 0);
 	wrmsr(HWCR_MSR, msr);