X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fboot%2Fhardwaremain.c;h=ca39660232c75063a92b886d87ec9afa3f0fabc5;hb=e16bee4a7c7723b45d72de29aea496a23fa32028;hp=5f5b0efb02b9185cfef764e2405eeb1017d3c527;hpb=3b314023802c7429012e5f09652047e0b32fb97a;p=coreboot.git diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c index 5f5b0efb0..ca3966023 100644 --- a/src/boot/hardwaremain.c +++ b/src/boot/hardwaremain.c @@ -31,8 +31,7 @@ it with the version available from LANL. #include #include #include -#include -#include +#include #include #include #include @@ -42,32 +41,37 @@ it with the version available from LANL. #if CONFIG_WRITE_HIGH_TABLES #include #endif +#include /** * @brief Main function of the RAM part of coreboot. * - * Coreboot is divided into Pre-RAM part and RAM part. - * + * Coreboot is divided into Pre-RAM part and RAM part. + * * Device Enumeration: - * In the dev_enumerate() phase, + * In the dev_enumerate() phase, */ +void hardwaremain(int boot_complete); + void hardwaremain(int boot_complete) { struct lb_memory *lb_mem; + tsc_t timestamps[6]; - post_code(0x80); + timestamps[0] = rdtsc(); + post_code(POST_ENTRY_RAMSTAGE); /* console_init() MUST PRECEDE ALL printk()! */ console_init(); - - post_code(0x39); - printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", + post_code(POST_CONSOLE_READY); + + printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", coreboot_version, coreboot_extra_version, coreboot_build, (boot_complete)?"rebooting":"booting"); - post_code(0x40); + post_code(POST_CONSOLE_BOOT_MSG); /* If we have already booted attempt a hard reboot */ if (boot_complete) { @@ -75,37 +79,55 @@ void hardwaremain(int boot_complete) } /* FIXME: Is there a better way to handle this? */ - init_timer(); + init_timer(); + timestamps[1] = rdtsc(); /* Find the devices we don't have hard coded knowledge about. */ dev_enumerate(); - post_code(0x66); + post_code(POST_DEVICE_ENUMERATION_COMPLETE); + + timestamps[2] = rdtsc(); + printk(BIOS_NOTICE, "===============Enumeration done!========\n"); /* Now compute and assign the bus resources. */ dev_configure(); - post_code(0x88); + post_code(POST_DEVICE_CONFIGURATION_COMPLETE); + + timestamps[3] = rdtsc(); /* Now actually enable devices on the bus */ dev_enable(); + + timestamps[4] = rdtsc(); /* And of course initialize devices on the bus */ dev_initialize(); - post_code(0x89); + post_code(POST_DEVICES_ENABLED); + timestamps[5] = rdtsc(); #if CONFIG_WRITE_HIGH_TABLES == 1 cbmem_initialize(); +#if CONFIG_CONSOLE_CBMEM + cbmemc_reinit(); +#endif #endif #if CONFIG_HAVE_ACPI_RESUME == 1 suspend_resume(); post_code(0x8a); #endif + timestamp_add(TS_START_RAMSTAGE, timestamps[0]); + timestamp_add(TS_DEVICE_ENUMERATE, timestamps[1]); + timestamp_add(TS_DEVICE_CONFIGURE, timestamps[2]); + timestamp_add(TS_DEVICE_ENABLE, timestamps[3]); + timestamp_add(TS_DEVICE_INITIALIZE, timestamps[4]); + timestamp_add(TS_DEVICE_DONE, timestamps[5]); + timestamp_add_now(TS_WRITE_TABLES); + /* Now that we have collected all of our information * write our configuration tables. */ lb_mem = write_tables(); -#if CONFIG_USE_FALLBACK_IMAGE == 1 - cbfs_load_payload(lb_mem, "fallback/payload"); -#else - cbfs_load_payload(lb_mem, "normal/payload"); -#endif + + timestamp_add_now(TS_LOAD_PAYLOAD); + cbfs_load_payload(lb_mem, CONFIG_CBFS_PREFIX "/payload"); printk(BIOS_ERR, "Boot failed.\n"); }