X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fbeh_scanner_tb.vhd;h=f5a0a34ad7d023a7f8f37b0c85666f19ec936c8c;hb=ca4e1de0b10cd086628b09e37219f0bb45421627;hp=71007f1d56aafd21de78bc429d64404295c1a854;hpb=acb693ce9970719ccc98b7368598d592491609ee;p=hwmod.git

diff --git a/src/beh_scanner_tb.vhd b/src/beh_scanner_tb.vhd
index 71007f1..f5a0a34 100644
--- a/src/beh_scanner_tb.vhd
+++ b/src/beh_scanner_tb.vhd
@@ -22,8 +22,7 @@ architecture sim of beh_scanner_tb is
 	signal stop : boolean := false;
 begin
 	inst : entity work.scanner(beh)
-	port map
-	(
+	port map (
 		sys_clk => sys_clk,
 		sys_res_n => sys_res_n,
 		-- ps/2
@@ -51,27 +50,45 @@ begin
 	end process;
 
 	process
+		function ascii2sc (x : hbyte) return hbyte is
+			variable y : hbyte;
+		begin
+			case x is
+				when x"30" => y := SC_KP_0;
+				when x"31" => y := SC_KP_1;
+				when x"32" => y := SC_KP_2;
+				when x"33" => y := SC_KP_3;
+				when x"34" => y := SC_KP_4;
+				when x"35" => y := SC_KP_5;
+				when x"36" => y := SC_KP_6;
+				when x"37" => y := SC_KP_7;
+				when x"38" => y := SC_KP_8;
+				when x"39" => y := SC_KP_9;
+				when x"2b" => y := SC_KP_PLUS;
+				when x"2d" => y := SC_KP_MINUS;
+				when x"2a" => y := SC_KP_MUL;
+				when x"2f" => y := SC_KP_DIV;
+				when x"20" => y := SC_SPACE;
+				when x"1c" => y := SC_ENTER;
+				when x"0e" => y := SC_BKSP;
+				when others => y := x"41";
+			end case;
+			return y;
+		end function;
+
 		function valid_char (x : std_logic_vector(7 downto 0); last : std_logic_vector(7 downto 0)) return boolean is
 				variable y : boolean;
 		begin
 			case x is
-				-- nur gueltig wenn davor ein numpad-mod byte gekommen ist
-				-- 0 - 4
-				when x"30" | x"31" | x"32" | x"33" | x"34" => y := last = x"e0";
-				-- 5 - 9
-				when x"35" | x"36" | x"37" | x"38" | x"39" => y := last = x"e0";
-				-- *, +, -, /
-				when x"2a" | x"2b" | x"2d" | x"2f" => y := last = x"e0";
-
-				-- immer gueltig
-				when x"20" => y := true; -- ' '
-				when x"1c" => y := true; -- enter
-				when x"0e" => y := true; -- backspace
-
-				-- alle anderen zeichen sind immer ungueltig
+				when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
+					SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
+					SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
+					SC_KP_MINUS | SC_KP_MUL |
+					SC_KP_DIV | SC_SPACE |
+					SC_BKSP | SC_ENTER =>
+						y := true;
 				when others => y := false;
 			end case;
-			-- assert(false) report "x: " & integer'image(to_integer(unsigned(x))) & ", last: " & integer'image(to_integer(unsigned(last))) & ", result: " & boolean'image(y);
 			return y;
 		end function;
 
@@ -107,7 +124,7 @@ begin
 			f1_loop : while not endfile(f) loop
 				readline (f, l);
 				input := (others => nul);
-				if (l'length <= 71) then
+				if (l'length <= 72) then
 					input(1 to l'length) := l.all;
 					if (input(1) = '#') then
 						next f1_loop;
@@ -123,7 +140,7 @@ begin
 			f2_loop : while not endfile(f) loop
 				readline (f, l);
 				expectedresult := (others => nul);
-				if (l'length <= 71) then
+				if (l'length <= 72) then
 					expectedresult(1 to l'length) := l.all;
 					if (expectedresult(1) = '#') then
 						next f2_loop;
@@ -152,12 +169,18 @@ begin
 				icwait(sys_clk, 1);
 				j := j + 1;
 
+				if j = 73 then
+					run_tc := false;
+					assert(false) report "wtf @ schleife";
+					next mainl;
+				end if;
+
 				new_data <= '1';
+
 				case input(j) is
-					when '$' => data <= x"1c"; -- $ (enter)
-					when '!' => data <= x"0e"; -- ! (backspace)
-					when '.' => data <= x"e0"; -- . (modifier fuer Numpad)
-					when others => data <= std_logic_vector(to_unsigned(character'pos(input(j)),8));
+					when nul => data <= ascii2sc(x"1c"); -- $ (enter)
+					when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
+					when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
 				end case;
 				icwait(sys_clk, 1);
 				new_data <= '0';