X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fbeh_pc_communication_tb.vhd;h=aa921e2dfc93bab00051a9a51a84fa4b83cb4f3a;hb=51361c5dc1ab06332a04260f5192adcb398238e6;hp=9d12996ecce539546c6c302ddca3142cb56e8d5c;hpb=030287b141ae40fd8c7e9e8060ee7a96ba109499;p=hwmod.git

diff --git a/src/beh_pc_communication_tb.vhd b/src/beh_pc_communication_tb.vhd
index 9d12996..aa921e2 100644
--- a/src/beh_pc_communication_tb.vhd
+++ b/src/beh_pc_communication_tb.vhd
@@ -23,7 +23,6 @@ architecture sim of beh_pc_communication_tb is
 		signal rx_new : std_logic;
 		signal pc_get : std_logic;
 		signal pc_done : std_logic;
-		signal pc_busy : std_logic;
 		signal rx_data, tx_data : std_logic_vector(7 downto 0);
 
 		signal pc_zeile : hzeile;
@@ -31,7 +30,7 @@ architecture sim of beh_pc_communication_tb is
 		signal pc_char : hbyte;
 begin
 	-- pc_communication
-	inst : entity work.pc_communication(beh)
+	inst : pc_communication
 	port map (
 		sys_clk => sys_clk,
 		sys_res_n => sys_res_n,
@@ -53,7 +52,6 @@ begin
 		pc_spalte => pc_spalte,
 		pc_get => pc_get,
 		pc_done => pc_done,
-		pc_busy => pc_busy,
 		pc_char => pc_char
 	);
 
@@ -75,7 +73,6 @@ begin
 	begin
 		pc_char <= (others => '0');
 		pc_done <= '0';
-		pc_busy <= '0';
 		wait until sys_res_n = '1';
 
 		while not endfile (f) loop
@@ -85,14 +82,11 @@ begin
 			while i < l'length loop
 				pc_done <= '0';
 				wait until rising_edge(pc_get);
-				wait for 90 ns;
-				pc_busy <= '1';
+				wait for 150 ns;
 				pc_char <= (others => '0');
-				wait for 300 ns;
-
+				wait for 30 ns;
 				pc_char <= hbyte(std_logic_vector(to_unsigned(character'pos(buf(i)),8)));
 				i := i + 1;
-				pc_busy <= '0';
 				pc_done <= '1';
 				wait for 30 ns;
 			end loop;