X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fbeh_parser_tb.vhd;h=6b3f9e6d414d6b82d82cbca224592a138156bf7e;hb=51361c5dc1ab06332a04260f5192adcb398238e6;hp=fc43bcf5303bc5dbdc2b155a8f6f12490de51d5f;hpb=6744ad83ff2e2715a4775ee08594f47cf1633c2e;p=hwmod.git

diff --git a/src/beh_parser_tb.vhd b/src/beh_parser_tb.vhd
index fc43bcf..6b3f9e6 100644
--- a/src/beh_parser_tb.vhd
+++ b/src/beh_parser_tb.vhd
@@ -10,28 +10,19 @@ architecture sim of beh_parser_tb is
 	-- system
 	signal sys_clk, sys_res_n : std_logic;
 	-- history
-	signal p_rw, p_rget, p_rdone, p_wtake, p_wdone, p_finished : std_logic;
+	signal p_rget, p_rdone, p_wtake, p_wdone, p_finished : std_logic;
 	signal p_read, p_write : hbyte;
-	signal p_spalte : hspalte;
-
-	-- alu
-	signal opcode : alu_ops;
-	signal op1, op2, op3 : csigned;
-	signal do_calc, calc_done : std_logic;
-
 	--scanner
 	signal do_it : std_logic;
 	signal finished : std_logic;
 
 	signal stop : boolean := false;
 begin
-	inst : entity work.parser(beh)
-	port map
-	(
+	inst : parser
+	port map (
 		sys_clk => sys_clk,
 		sys_res_n => sys_res_n,
-		p_rw => p_rw,
-		p_spalte => p_spalte,
+		-- history
 		p_rget => p_rget,
 		p_rdone => p_rdone,
 		p_read => p_read,
@@ -39,32 +30,11 @@ begin
 		p_wdone => p_wdone,
 		p_write => p_write,
 		p_finished => p_finished,
-		-- ALU
-		opcode => opcode,
-		op1 => op1,
-		op2 => op2,
-		op3 => op3,
-		do_calc => do_calc,
-		calc_done => calc_done,
-		-- TODO: calc_error : in std_logic;
 		-- Scanner
 		do_it => do_it,
 		finished => finished
 	);
 
-	instalu : entity work.alu(beh)
-	port map
-	(
-		sys_clk => sys_clk,
-		sys_res_n => sys_res_n,
-		do_calc => do_calc,
-		calc_done => calc_done,
-		op1 => op1,
-		op2 => op2,
-		op3 => op3,
-		opcode => opcode
-	);
-
 	process
 	begin
 		sys_clk <= '0';
@@ -85,10 +55,11 @@ begin
 		variable input : hstring;
 		variable expectedresult : hstring;
 		variable realresult : hstring;
+		variable hstrtmp : hstring;
 
 		variable checkall : boolean := true;
 		variable run_tc : boolean := true;
-		variable i, j, k : natural;
+		variable i, j, k, y : natural;
 	begin
 		-- init & reset
 		sys_res_n <= '0';
@@ -102,12 +73,12 @@ begin
 
 		i := 1;
 		f_loop : while not endfile(f) loop
-			realresult := (others => character'val(0));
+			realresult := (HSPALTE_MAX+1 => nul, others => ' ');
 
 			f1_loop : while not endfile(f) loop
 				readline (f, l);
-				input := (others => character'val(0));
-				if (l'length <= 72) then
+				input := (others => nul);
+				if (l'length <= HSPALTE_MAX+1) then
 					input(1 to l'length) := l.all;
 					if (input(1) = '#') then
 						next f1_loop;
@@ -122,12 +93,13 @@ begin
 
 			f2_loop : while not endfile(f) loop
 				readline (f, l);
-				expectedresult := (others => character'val(0));
-				if (l'length <= 72) then
+				expectedresult := (others => nul);
+				if (l'length <= HSPALTE_MAX+1) then
 					expectedresult(1 to l'length) := l.all;
 					if (expectedresult(1) = '#') then
 						next f2_loop;
 					else
+						y := l'length;
 						exit f2_loop;
 					end if;
 				else
@@ -136,6 +108,16 @@ begin
 				end if;
 			end loop f2_loop;
 
+			-- ergebnis string richtig formatieren
+			hstrtmp := expectedresult;
+			expectedresult := (HSPALTE_MAX+1 => nul, others => ' ');
+			for x in 1 to HSPALTE_MAX loop
+				if hstrtmp(x) /= nul then
+					expectedresult((HSPALTE_MAX-y) + x) := hstrtmp(x);
+				end if;
+			end loop;
+
+
 			report "testcase(" & natural'image(i) & ").input: " & input;
 			report "testcase(" & natural'image(i) & ").expectedresult: " & expectedresult;
 			i := i + 1;
@@ -143,7 +125,7 @@ begin
 			icwait(sys_clk, 5);
 			do_it <= '1';
 			run_tc := true;
-			j := 1; k := 1;
+			j := 1; k := HSPALTE_MAX;
 
 			while run_tc loop
 				wait on p_rget, p_wtake, p_finished, finished;
@@ -161,7 +143,7 @@ begin
 				if p_wtake = '1' then
 					realresult(k) := character'val(to_integer(unsigned(p_write)));
 					p_wdone <= '1';
-					k := k + 1;
+					k := k - 1;
 				end if;
 				if p_wtake = '0' then
 					p_wdone <= '0';
@@ -173,7 +155,7 @@ begin
 			end loop;
 			
 			do_it <= '0';
-			report "realresult: " & realresult;
+			report "realresult                : " & realresult;
 			if realresult /= expectedresult then
 				checkall := false;
 			end if;