X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Fbeh_history_tb.vhd;h=87115c724c2ed37b7ed3faa0634838bea4ee4250;hb=5198223f6d43e915eed4be1d0bbbbc7f908ef6b1;hp=f76e2c4ec1745d128f869455d91799a8dbab4546;hpb=b5f4c3b9738dc7a08fac9e1f99057f6b44569588;p=hwmod.git

diff --git a/src/beh_history_tb.vhd b/src/beh_history_tb.vhd
index f76e2c4..87115c7 100644
--- a/src/beh_history_tb.vhd
+++ b/src/beh_history_tb.vhd
@@ -38,6 +38,16 @@ architecture sim of beh_history_tb is
 	signal p_finished : std_logic;
 	-- parser/scanner
 	signal do_it, finished : std_logic;
+	--uart_tx
+	signal tx_data : std_logic_vector(7 downto 0);
+	signal tx_new, tx_done, txd : std_logic;
+	--pc_communication
+	signal pc_zeile : hzeile;
+	signal pc_spalte : hspalte;
+	signal pc_get, pc_done : std_logic;
+	signal pc_char : hbyte;
+	--dummy button
+	signal btn_a_int : std_logic;
 
 	signal stop : boolean := false;
 begin
@@ -67,7 +77,13 @@ begin
 		p_wtake => p_wtake,
 		p_wdone => p_wdone,
 		p_write => p_write,
-		p_finished => p_finished
+		p_finished => p_finished,
+		-- PC-komm
+		pc_get    => pc_get,
+		pc_spalte => pc_spalte,
+		pc_zeile  => pc_zeile,
+		pc_char   => pc_char,
+		pc_done   => pc_done
 	);
 
 	-- display
@@ -125,7 +141,38 @@ begin
 		do_it => do_it,
 		finished => finished
 	);
+	--uart_tx
+	inst_uart : entity work.uart_tx(beh)
+	port map (
+		sys_clk => sys_clk,
+		sys_res_n => sys_res_n,
+		txd => txd,
+		tx_data =>tx_data,
+		tx_new => tx_new,
+		tx_done => tx_done
+	);
 
+	--pc_communication
+	inst_pc_com : entity work.pc_communication(beh)
+	port map(
+		sys_clk => sys_clk,
+		sys_res_n => sys_res_n,
+		--button
+		btn_a => btn_a_int,
+		--uart_tx
+		tx_data => tx_data,
+		tx_new => tx_new,
+		tx_done => tx_done,
+		--uart_rx
+		rx_data => (others => '0'),
+		rx_new => '0',
+		-- History
+		pc_zeile  => pc_zeile,
+		pc_spalte => pc_spalte,
+		pc_get    => pc_get,
+		pc_done   => pc_done,
+		pc_char   => pc_char
+	);
 
 	process
 	begin
@@ -150,48 +197,6 @@ begin
 	end process;
 
 	process
-		function ascii2sc (x : hbyte) return hbyte is
-			variable y : hbyte;
-		begin
-			case x is
-				when x"30" => y := SC_KP_0;
-				when x"31" => y := SC_KP_1;
-				when x"32" => y := SC_KP_2;
-				when x"33" => y := SC_KP_3;
-				when x"34" => y := SC_KP_4;
-				when x"35" => y := SC_KP_5;
-				when x"36" => y := SC_KP_6;
-				when x"37" => y := SC_KP_7;
-				when x"38" => y := SC_KP_8;
-				when x"39" => y := SC_KP_9;
-				when x"2b" => y := SC_KP_PLUS;
-				when x"2d" => y := SC_KP_MINUS;
-				when x"2a" => y := SC_KP_MUL;
-				when x"2f" => y := SC_KP_DIV;
-				when x"20" => y := SC_SPACE;
-				when x"1c" => y := SC_ENTER;
-				when x"0e" => y := SC_BKSP;
-				when others => y := x"41";
-			end case;
-			return y;
-		end function;
-
-		function valid_char (x : std_logic_vector(7 downto 0)) return boolean is
-				variable y : boolean;
-		begin
-			case x is
-				when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
-					SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
-					SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
-					SC_KP_MINUS | SC_KP_MUL |
-					SC_KP_DIV | SC_SPACE |
-					SC_BKSP | SC_ENTER =>
-						y := true;
-				when others => y := false;
-			end case;
-			return y;
-		end function;
-
 		-- textio stuff
 		use std.textio.all;
 		file f : text open read_mode is "../../src/history.test";
@@ -247,21 +252,20 @@ begin
 					next mainl;
 				end if;
 
-				-- jedes mal release
-				new_data <= '1';
-				data <= x"f0";
-				icwait(sys_clk, 1);
-				new_data <= '0';
-				icwait(sys_clk, 1);
 				new_data <= '1';
 
 				case input(j) is
 					when nul => data <= ascii2sc(x"1c"); -- $ (enter)
 					when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
+					when '/' =>
+						data <= x"e0";
+						icwait(sys_clk, 1);
+						new_data <= '0';
+						icwait(sys_clk, 1);
+						new_data <= '1';
+						data <= SC_KP_DIV;
 					when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
 				end case;
-				icwait(sys_clk, 1);
-				new_data <= '0';
 
 				-- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
 				-- in abhaengigkeit zum vorherigen zeichen)
@@ -280,18 +284,13 @@ begin
 					run_inner := false;
 					if s_backspace = '1' or s_take = '1' then
 						icwait(sys_clk, 1);
-						s_done <= '1';
 						wait on s_take; -- = '0'
 						icwait(sys_clk, 1);
-						s_done <= '0';
 					elsif do_it = '1' then
 						-- dauert normalweiser noch laenger (parser braucht
 						-- relativ lange)
 						icwait(sys_clk, 7);
-						finished <= '1';
 						wait on do_it; -- = '0'
-						icwait(sys_clk, 1);
-						finished <= '0';
 						icwait(sys_clk, 850);
 
 						run_tc := false;
@@ -304,8 +303,21 @@ begin
 			report "==================";
 		end loop f_loop;
 
-		icwait(sys_clk, 850);
+		-- uart ist ziemlich langsam...
+		icwait(sys_clk, 1000000000);
 		stop <= true;
 		wait;
 	end process;
+
+	btn_pressed : process is
+	begin
+		btn_a_int <= '1';
+		wait until sys_res_n = '1';
+		icwait(sys_clk, 50000);
+		wait until rising_edge(sys_clk);
+		btn_a_int <= '0';
+		wait for 30 ns;
+		btn_a_int <= '1';
+		wait;
+	end process btn_pressed;
 end architecture sim;