X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Farch%2Fx86%2FMakefile.inc;h=f131af9537ed8d66ccc4692391c9764c152961d4;hb=a01ec147e9bd0df0f38a74938640443f7dd2cd6d;hp=ea6e3ecb14875a4aabf98129c2ce493af416c874;hpb=8677a23d5b053d550f70246de9c7dc8fd4e2fbf9;p=coreboot.git

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
old mode 100644
new mode 100755
index ea6e3ecb1..f131af953
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -27,24 +27,24 @@ subdirs-y += smp
 
 OPTION_TABLE_H:=
 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
-ramstage-srcs += $(obj)/option_table.c
+cbfs-files-y += cmos_layout.bin
+cmos_layout.bin-file = $(obj)/cmos_layout.bin
+cmos_layout.bin-type = 0x01aa
+
 OPTION_TABLE_H:=$(obj)/option_table.h
 endif
 
 #######################################################################
 # Build the final rom image
 COREBOOT_ROM_DEPENDENCIES:=
-ifneq ($(CONFIG_PAYLOAD_NONE),y)
-COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_PAYLOAD_FILE)
-endif
-ifeq ($(CONFIG_VGA_BIOS),y)
-COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_VGA_BIOS_FILE)
+ifeq ($(CONFIG_PAYLOAD_ELF),y)
+COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
 endif
-ifeq ($(CONFIG_INTEL_MBI),y)
-COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_MBI_FILE)
+ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
+COREBOOT_ROM_DEPENDENCIES+=seabios
 endif
-ifeq ($(CONFIG_BOOTSPLASH),y)
-COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_BOOTSPLASH_FILE)
+ifeq ($(CONFIG_PAYLOAD_FILO),y)
+COREBOOT_ROM_DEPENDENCIES+=filo
 endif
 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
@@ -53,6 +53,26 @@ ifeq ($(CONFIG_GEODE_VSA_FILE),y)
 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
 endif
 
+extract_nth=$(word $(1), $(subst |, ,$(2)))
+
+ifneq ($(CONFIG_UPDATE_IMAGE),y)
+prebuild-files = \
+	$(foreach file,$(cbfs-files), \
+	$(CBFSTOOL) $@.tmp add $(call extract_nth,1,$(file)) \
+	$(call extract_nth,2,$(file)) $(call extract_nth,3,$(file)) \
+	$(call extract_nth,4,$(file)) &&)
+prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
+
+$(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL)
+	$(CBFSTOOL) $@.tmp create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock
+	$(prebuild-files) true
+	mv $@.tmp $@
+else
+.PHONY: $(obj)/coreboot.pre1
+$(obj)/coreboot.pre1: $(CBFSTOOL)
+	mv $(obj)/coreboot.rom $@
+endif
+
 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
 	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
 	cp $(obj)/coreboot.pre $@.tmp
@@ -63,32 +83,49 @@ $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call
 	$(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
 ifeq ($(CONFIG_PAYLOAD_NONE),y)
 	@printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
-else
-	@printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
-	$(CBFSTOOL) $@.tmp add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
 endif
-ifeq ($(CONFIG_VGA_BIOS),y)
-	@printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
-	$(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
+ifeq ($(CONFIG_PAYLOAD_ELF),y)
+	@printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
+	$(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
 endif
-ifeq ($(CONFIG_INTEL_MBI),y)
-	@printf "    MBI        $(CONFIG_FALLBACK_MBI_FILE)\n"
-	$(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_MBI_FILE) mbi.bin mbi
+ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
+	@printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
+	$(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
 endif
-ifeq ($(CONFIG_BOOTSPLASH),y)
-	@printf "    BOOTSPLASH $(CONFIG_FALLBACK_BOOTSPLASH_FILE)\n"
-	$(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
+ifeq ($(CONFIG_PAYLOAD_FILO),y)
+	@printf "    PAYLOAD    FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
+	$(CBFSTOOL) $@.tmp add-payload $(CONFIG_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
 endif
 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
 	@printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
 	$(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
 	$(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
 	$(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
+endif
+ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
+	@printf "    CONFIG     $(DOTCONFIG)\n"
+	if [ -f $(DOTCONFIG) ]; then \
+	echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
+	sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
+	$(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
 endif
 	mv $@.tmp $@
 	@printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
 	$(CBFSTOOL) $@ print
 
+stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
+cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
+pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
+pci$(stripped_vgabios_id).rom-type := optionrom
+
+cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
+mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
+mbi.bin-type := mbi
+
+cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
+bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
+bootsplash.jpg-type := bootsplash
+
 #######################################################################
 # i386 specific tools
 
@@ -96,9 +133,9 @@ $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINB
 	@printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 	$(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
 
-$(obj)/option_table.c: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
+$(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
 	@printf "    OPTION     $(subst $(obj)/,,$(@))\n"
-	$(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --option $@
+	$(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@
 
 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
 	@printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
@@ -109,11 +146,12 @@ $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src
 
 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
-	$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
-	$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
-	$(OBJCOPY) --strip-debug $@
-	$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
+	$(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
+	$(NM) -n $@.tmp | sort > $@.map
+	$(OBJCOPY) --only-keep-debug $@.tmp $@.debug
+	$(OBJCOPY) --strip-debug $@.tmp
+	$(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp
+	mv $@.tmp $@
 
 $(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
@@ -131,12 +169,12 @@ ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 
 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
-	$(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
-	$(OBJCOPY) --strip-debug $@
-	$(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
-	$(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
-
+	$(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^
+	$(OBJCOPY) --only-keep-debug $@.tmp $@.debug
+	$(OBJCOPY) --strip-debug $@.tmp
+	$(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp
+	$(NM) -n $@.tmp | sort > $@.map
+	mv $@.tmp $@
 
 endif
 
@@ -145,19 +183,9 @@ endif
 
 crt0s = $(src)/arch/x86/init/prologue.inc
 ldscripts =
-ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(src)/cpu/x86/16bit/entry16.inc
-ldscripts += $(src)/cpu/x86/16bit/entry16.lds
-endif
+ldscripts += $(src)/arch/x86/init/bootblock.ld
 crt0s += $(src)/cpu/x86/32bit/entry32.inc
 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(src)/cpu/x86/16bit/reset16.inc
-ldscripts += $(src)/cpu/x86/16bit/reset16.lds
-crt0s += $(src)/arch/x86/lib/id.inc
-ldscripts += $(src)/arch/x86/lib/id.lds
-endif
 
 crt0s += $(src)/cpu/x86/fpu_enable.inc
 ifeq ($(CONFIG_SSE),y)
@@ -179,18 +207,6 @@ endif
 
 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
-ifeq ($(CONFIG_SSE),y)
-crt0s += $(src)/cpu/x86/sse_disable.inc
-endif
-ifeq ($(CONFIG_MMX),y)
-crt0s += $(src)/cpu/x86/mmx_disable.inc
-endif
-
-ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
-crt0s += $(chipset_bootblock_inc)
-ldscripts += $(chipset_bootblock_lds)
-endif
-
 ifeq ($(CONFIG_ROMCC),y)
 crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 endif
@@ -205,15 +221,16 @@ else
 
 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
+	$(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
 	@printf "    CC         romstage.inc\n"
 	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
 	@printf "    POST       romstage.inc\n"
-	sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
+	sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
+		-e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
 	mv $@.tmp $@
 endif
 
@@ -250,8 +267,146 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 endif
 
-ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
-include $(src)/arch/x86/Makefile.bootblock.inc
-else
-include $(src)/arch/x86/Makefile.bigbootblock.inc
+#######################################################################
+# Build the final rom image
+
+$(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
+	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
+	cp $(obj)/coreboot.pre1 $@.tmp
+	$(CBFSTOOL) $@.tmp add-stage $(obj)/romstage.elf \
+		$(CONFIG_CBFS_PREFIX)/romstage x $(shell cat $(obj)/location.txt)
+	mv $@.tmp $@
+
+#######################################################################
+# Build the bootblock
+
+$(obj)/coreboot.bootblock: $(obj)/bootblock.elf
+	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+	$(OBJCOPY) -O binary $< $@
+
+bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
+bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
+bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
+bootblock_lds += $(src)/arch/x86/lib/id.lds
+bootblock_lds += $(chipset_bootblock_lds)
+
+bootblock_inc = $(src)/arch/x86/init/prologue.inc
+bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
+bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
+bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
+bootblock_inc += $(src)/arch/x86/lib/id.inc
+bootblock_inc += $(chipset_bootblock_inc)
+
+ifeq ($(CONFIG_SSE),y)
+bootblock_inc += $(src)/cpu/x86/sse_enable.inc
 endif
+bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
+bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
+
+bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
+ifeq ($(CONFIG_SSE),y)
+bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__
+endif
+
+$(obj)/bootblock/ldscript.ld: $$(bootblock_lds) $(obj)/ldoptions
+	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
+	mkdir -p $(obj)/bootblock
+	printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@
+
+$(obj)/bootblock/bootblock.S: $$(bootblock_inc)
+	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
+	mkdir -p $(obj)/bootblock
+	printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+	$(CC) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
+
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S $(obj)/config.h $(obj)/build.h
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
+	@printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
+	$(CC) $(INCLUDES) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
+		$< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
+	$(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
+
+$(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
+	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
+	$(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(obj)/bootblock/ldscript.ld $<
+	$(NM) -n $@.tmp | sort > $(obj)/bootblock.map
+	$(OBJCOPY) --only-keep-debug $@.tmp $(obj)/bootblock.debug
+	$(OBJCOPY) --strip-debug $@.tmp
+	$(OBJCOPY) --add-gnu-debuglink=$(obj)/bootblock.debug $@.tmp
+	mv $@.tmp $@
+
+#######################################################################
+# Build the romstage
+
+$(obj)/romstage.bin: $$(romstage-objs) $(obj)/romstage/link1st.ld
+	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
+	$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link1st.ld $(romstage-objs)
+	$(OBJCOPY) -O binary $(obj)/romstage.elf $@
+
+$(obj)/coreboot.romstage: $$(romstage-objs) $(obj)/romstage/link2nd.ld
+	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
+	$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link2nd.ld $(romstage-objs)
+	$(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map
+	$(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug
+	$(OBJCOPY) --strip-debug $(obj)/romstage.elf
+	$(OBJCOPY) --add-gnu-debuglink=$(obj)/romstage.debug $(obj)/romstage.elf
+	$(OBJCOPY) -O binary $(obj)/romstage.elf $@
+
+$(obj)/romstage/link1st.ld: $$(ldscripts) $(obj)/ldoptions
+	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
+	mkdir -p $(obj)/romstage
+	rm -f $@
+	printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp
+	printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp
+	mv $@.tmp $@
+
+$(obj)/romstage/link2nd.ld: $(obj)/romstage/link1st.ld $(obj)/location.txt
+	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
+	rm -f $@
+	sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(obj)/location.txt > $@.tmp
+	sed -e '/ROMSTAGE_BASE/d' $(obj)/romstage/link1st.ld >> $@.tmp
+	mv $@.tmp $@
+
+$(obj)/location.txt: $(obj)/coreboot.pre1 $(obj)/romstage.bin
+	rm -f $@
+	$(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $@.tmp \
+	 || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; }
+	sed -i -e 's/^/0x/g' $@.tmp
+	mv $@.tmp $@
+
+$(obj)/romstage/crt0.S: $$(crt0s)
+	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
+	mkdir -p $(obj)/romstage
+	printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+	$(CC) -Wa,-acdlns -c -o $@ $<  > $(dir $@)/crt0.disasm
+
+$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S $(obj)/config.h $(obj)/build.h
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
+
+seabios:
+	$(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
+			HOSTCC="$(HOSTCC)" \
+			CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
+			OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
+			CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
+			CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \
+			OUT=$(abspath $(obj))
+
+filo:
+	$(MAKE) -C payloads/external/FILO -f Makefile.inc \
+			HOSTCC="$(HOSTCC)" \
+			CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
+			OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
+			CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
+			CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
+