X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=src%2Falu.vhd;fp=src%2Falu.vhd;h=2d9e4a7523ea95df162b0c83e6fd07bf4c385385;hb=654053720a33901dfd9c2361cb7f3ffbd7893266;hp=de0b6a6aa32c4c0d95cce84bfe13a4edfb032a28;hpb=c71721ad4d9cea1660498a32fd7353712149e5fb;p=hwmod.git

diff --git a/src/alu.vhd b/src/alu.vhd
index de0b6a6..2d9e4a7 100644
--- a/src/alu.vhd
+++ b/src/alu.vhd
@@ -13,7 +13,6 @@ entity alu is
 		op2 : in csigned;
 		op3 : out csigned;
 		do_calc : in std_logic;
-		ack : in std_logic;
 		calc_done : out std_logic
 	);
 end entity alu;
@@ -34,25 +33,27 @@ begin
 	end process;
 
 	-- next state
-	process(state, opcode, done_intern)
+	process(state, opcode, done_intern, do_calc)
 	begin
 		-- set a default value for next state
 		state_next <= state;
 		-- next state berechnen
 		case state is
 			when SIDLE =>
-				case opcode is
-					when ADD =>
-						state_next <= SADD;
-					when SUB =>
-						state_next <= SSUB;
-					when MUL =>
-						state_next <= SMUL;
-					when DIV =>
-						state_next <= SDIV;
-					when others =>
-						state_next <= SIDLE;
-				end case;
+				if do_calc = '1' then
+					case opcode is
+						when ADD =>
+							state_next <= SADD;
+						when SUB =>
+							state_next <= SSUB;
+						when MUL =>
+							state_next <= SMUL;
+						when DIV =>
+							state_next <= SDIV;
+						when others =>
+							state_next <= SIDLE;
+					end case;
+				end if;
 			when SADD =>
 				if done_intern = '1' then
 					state_next <= SDONE;
@@ -70,7 +71,7 @@ begin
 					state_next <= SDONE;
 				end if;
 			when SDONE =>
-				if ack = '1' then
+				if do_calc = '0' then
 					state_next <= SIDLE;
 				end if;
 		end case;
@@ -78,6 +79,8 @@ begin
 
 	-- output
 	process(state)
+	variable tmperg : csigned;
+	variable multmp : signed(((2*CBITS)-1) downto 0);
 	begin
 		op3 <= (others => '0');
 		calc_done <= '0';
@@ -86,20 +89,23 @@ begin
 			when SIDLE =>
 				done_intern <= '0';
 			when SADD =>
-				op3 <= op1 + op2;
+				tmperg := op1 + op2;
 				done_intern <= '1';
 			when SSUB =>
-				op3 <= op1 - op2;
+				tmperg := op1 - op2;
 				done_intern <= '1';
 			when SMUL =>
-				op3 <= op1 * op2;
+				multmp := op1 * op2;
+				tmperg(CBITS-1) := multmp((2*CBITS)-1);
+				tmperg((CBITS-2) downto 0) := multmp((CBITS-2) downto 0);
 				done_intern <= '1';
 			when SDIV =>
-				op3 <= op1 / op2;
+				tmperg := op1 / op2;
 				done_intern <= '1';
 			when SDONE =>
 				done_intern <= '1';
 				calc_done <= '1';
+				op3 <= tmperg;
 		end case;
 	end process;
 end architecture beh;