X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=quartus%2Fproject_gen.tcl;h=242d42b499b014d7f3e5a7a3d38f6e5759079e9c;hb=0a819b2f3c94c65351e99c5eba67b00de1163710;hp=62d62a359b02894a3ffb849a3a53efb6d2a30cae;hpb=4d6cc6ba70abf036904d501afb7fea6d059c5297;p=hwmod.git

diff --git a/quartus/project_gen.tcl b/quartus/project_gen.tcl
index 62d62a3..242d42b 100644
--- a/quartus/project_gen.tcl
+++ b/quartus/project_gen.tcl
@@ -41,10 +41,13 @@ if {$make_assignments} {
 	#include source files
 	set_global_assignment -name TOP_LEVEL_ENTITY calc
 	set_global_assignment -name VHDL_FILE ../../src/gen_pkg.vhd
-	set_global_assignment -name VHDL_FILE ../../src/calc.vhd
 	set_global_assignment -name VHDL_FILE ../../src/alu.vhd
 	set_global_assignment -name VHDL_FILE ../../src/parser.vhd
 	set_global_assignment -name VHDL_FILE ../../src/scanner.vhd
+	set_global_assignment -name VHDL_FILE ../../src/display.vhd
+	set_global_assignment -name VHDL_FILE ../../src/sp_ram.vhd
+	set_global_assignment -name VHDL_FILE ../../src/history.vhd
+	set_global_assignment -name VHDL_FILE ../../src/calc.vhd
 	set_global_assignment -name VHDL_FILE ../../src/vpll.vhd
 	
 	#vga ip-core
@@ -80,6 +83,20 @@ if {$make_assignments} {
 	#gen ip-core
 	set_global_assignment -name VHDL_FILE ../../src/math_pkg.vhd
 
+	#debouncing
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/counter.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/counter_beh.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_fsm.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_fsm_beh.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_pkg.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_struct.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/event_counter.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/event_counter_beh.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/event_counter_pkg.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/sync.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/sync_beh.vhd
+	set_global_assignment -name VHDL_FILE ../../src/debouncing/sync_pkg.vhd
 
 	#pin mapping/system
 	set_location_assignment PIN_N3 -to sys_clk
@@ -88,21 +105,23 @@ if {$make_assignments} {
 	#vga
 	set_location_assignment PIN_F1 -to hsync_n
 	set_location_assignment PIN_F2 -to vsync_n
-	set_location_assignment E22 -to r[0]
-	set_location_assignment T4 -to r[1]
-	set_location_assignment T7 -to r[2]
-	set_location_assignment E23 -to g[0]
-	set_location_assignment T5 -to g[1]
-	set_location_assignment T24 -to g[2]
-	set_location_assignment E24 -to b[0]
-	set_location_assignment T6 -to b[1]
+	set_location_assignment PIN_E22 -to r[0]
+	set_location_assignment PIN_T4 -to r[1]
+	set_location_assignment PIN_T7 -to r[2]
+	set_location_assignment PIN_E23 -to g[0]
+	set_location_assignment PIN_T5 -to g[1]
+	set_location_assignment PIN_T24 -to g[2]
+	set_location_assignment PIN_E24 -to b[0]
+	set_location_assignment PIN_T6 -to b[1]
 
 	#ps/2
-	set_location_assignment Y26 -to ps2_clk
-	set_location_assignment E21 -to ps2_data
+	set_location_assignment PIN_Y26 -to ps2_clk
+	set_location_assignment PIN_E21 -to ps2_data
 
 	set_global_assignment -name FMAX_REQUIREMENT "33.33 MHz" -section_id sys_clk
 	set_instance_assignment -name CLOCK_SETTINGS sys_clk -to sys_clk
+	#warning fix fuer pll
+	set_global_assignment -name ENABLE_CLOCK_LATENCY ON
 
 	set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
 	set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"