X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=pkernel%2Fstart91460.asm;h=76d9da172c94e63579df3c1886fa001bed75a7e0;hb=909b8a72c470bc2b4a3680440bd0bb3b8c4c5a7b;hp=10ae79412ce5c757372dec03882fcce8c682a225;hpb=0be0ee88510065a2788f4745c9fb66123091ee68;p=pyfrprog.git

diff --git a/pkernel/start91460.asm b/pkernel/start91460.asm
index 10ae794..76d9da1 100644
--- a/pkernel/start91460.asm
+++ b/pkernel/start91460.asm
@@ -26,9 +26,7 @@
 #set    others          7                       ; MB91460 series
 ;
 ;
-#set    DEVICE          MB91465K                ; <<< select device
-;
-#set    BOOT_FLASH_SEC  OFF                     ; <<< BOOT and Flash Security Vector    
+#set    DEVICE          MB91465X                ; <<< select device
 ;=========================================================================================
 ; 4.3  Stack Type and Stack Size
 ;=========================================================================================
@@ -203,59 +201,29 @@
  __systemstack_top: 
 #endif
  
-        .SECTION  USTACK, STACK, ALIGN=4
-#if STACK_RESERVE == ON
-         .EXPORT        __userstack, __userstack_top
- __userstack:
-        .RES.B          STACK_USR_SIZE
- __userstack_top:
- 
-#endif
 ;=========================================================================================
 ; 6.2  Define Sections
 ;=========================================================================================
         .section        DATA,  data,  align=4
         .section        INIT,  data,  align=4
         .section        IRAM,  code,  align=4
-        .section        CONST, const, align=4
-        .section        INTVECT, const, align=4 
         
 #if I_RAM 
         .import _RAM_IRAM
         .import _ROM_IRAM
 #endif
                     
-#if (BOOT_FLASH_SEC == OFF)        
-        .data.w 0xFFFFFFFF
-        .data.w 0xFFFFFFFF
-        .data.w 0xFFFFFFFF
-        .data.w 0xFFFFFFFF       
-#else
-        .res.w          4
-#endif         
-   
 ;-----------------------------------------------------------------------------------------
 ; MACRO Clear RC Watchdog
 ;-----------------------------------------------------------------------------------------
 #macro  ClearRCwatchdog
         LDI             #0x4C7,R7               ; clear RC watchdog
         BANDL           #0x7,@R7
-#endm
-;-----------------------------------------------------------------------------------------
-; MACRO WAIT_LOOP
-;-----------------------------------------------------------------------------------------
-#macro wait_loop loop_number
-#local _wait64_loop
-        LDI             #loop_number, R0
-_wait64_loop:
-        ADD             #-1, R0
-        BNE             _wait64_loop
 #endm
         .section        CODE, code, align=4
         .section        CODE_START, code, align=4
 #pragma section CODE=IRAM,attr=CODE
 
-
 ;=========================================================================================
 ; 7.  S T A R T 
 ;=========================================================================================
@@ -268,26 +236,13 @@ startnop:
         ClearRCwatchdog                         ; clear harware watchdog
 
 ;=========================================================================================
-; 7.1  Initialise Stack Pointer and Table Base Register
+; 7.1  Initialise Stack Pointer
 ;=========================================================================================
 #if STACKUSE == SYSSTACK       
-        ORCCR           #0x20
-        LDI             #__userstack_top, SP    ; initialize SP
         ANDCCR          #0xDF
         LDI             #__systemstack_top, SP  ; initialize SP
 #endif
 
-#if STACKUSE == USRSTACK
-        ANDCCR          #0xDF
-        LDI             #__systemstack_top, SP  ; initialize SP
-        ORCCR           #0x20
-        LDI             #__userstack_top, SP    ; initialize SP
-#endif
-
-        LDI             #INTVECT, R0            ; set Table Base
-smd_tbr: 
-        MOV             R0, TBR         
-
 #if (CLOCKSOURCE != NOCLOCK)                                          
 ;=========================================================================================
 ; 7.2  Check for CSV reset and set CSV