X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=mono%2Futils%2Fmono-sigcontext.h;h=3837e698a168cdc77f3821a16456261bbbd5dd0b;hb=161c807083bf5d889079a64604a176073eea8e1f;hp=aea046d6de3153d546f1eb54758f00b9df4b2b20;hpb=41e243af7374fe57ae05ca53034b7c2d53ba4a9d;p=mono.git diff --git a/mono/utils/mono-sigcontext.h b/mono/utils/mono-sigcontext.h index aea046d6de3..3837e698a16 100644 --- a/mono/utils/mono-sigcontext.h +++ b/mono/utils/mono-sigcontext.h @@ -1,8 +1,12 @@ +/** + * \file + */ + #ifndef __MONO_MONO_SIGCONTEXT_H__ #define __MONO_MONO_SIGCONTEXT_H__ #include -#if defined(PLATFORM_ANDROID) +#if defined(HOST_ANDROID) #include #endif @@ -45,6 +49,15 @@ #define UCONTEXT_REG_ESI(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__ss.__esi) #define UCONTEXT_REG_EDI(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__ss.__edi) #define UCONTEXT_REG_EIP(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__ss.__eip) + #define UCONTEXT_REG_XMM + #define UCONTEXT_REG_XMM0(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm0) + #define UCONTEXT_REG_XMM1(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm1) + #define UCONTEXT_REG_XMM2(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm2) + #define UCONTEXT_REG_XMM3(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm3) + #define UCONTEXT_REG_XMM4(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm4) + #define UCONTEXT_REG_XMM5(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm5) + #define UCONTEXT_REG_XMM6(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm6) + #define UCONTEXT_REG_XMM7(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm7) # else #define UCONTEXT_REG_EAX(ctx) (((ucontext_t*)(ctx))->uc_mcontext->ss.eax) #define UCONTEXT_REG_EBX(ctx) (((ucontext_t*)(ctx))->uc_mcontext->ss.ebx) @@ -76,7 +89,7 @@ #define UCONTEXT_REG_ESI(ctx) (((ucontext_t*)(ctx))->sc_esi) #define UCONTEXT_REG_EDI(ctx) (((ucontext_t*)(ctx))->sc_edi) #define UCONTEXT_REG_EIP(ctx) (((ucontext_t*)(ctx))->sc_eip) -#elif defined(PLATFORM_SOLARIS) +#elif defined(HOST_SOLARIS) #define UCONTEXT_REG_EAX(ctx) (((ucontext_t*)(ctx))->uc_mcontext.gregs [EAX]) #define UCONTEXT_REG_EBX(ctx) (((ucontext_t*)(ctx))->uc_mcontext.gregs [EBX]) #define UCONTEXT_REG_ECX(ctx) (((ucontext_t*)(ctx))->uc_mcontext.gregs [ECX]) @@ -88,7 +101,7 @@ #define UCONTEXT_REG_EIP(ctx) (((ucontext_t*)(ctx))->uc_mcontext.gregs [EIP]) #else -#if defined(PLATFORM_ANDROID) && !defined(HAVE_UCONTEXT_H) +#if defined(HOST_ANDROID) && !defined(HAVE_UCONTEXT_H) /* No ucontext.h as of NDK v6b */ typedef int greg_t; #define NGREG 19 @@ -173,6 +186,23 @@ typedef struct ucontext { #define UCONTEXT_REG_R13(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__ss.__r13) #define UCONTEXT_REG_R14(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__ss.__r14) #define UCONTEXT_REG_R15(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__ss.__r15) + #define UCONTEXT_REG_XMM + #define UCONTEXT_REG_XMM0(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm0) + #define UCONTEXT_REG_XMM1(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm1) + #define UCONTEXT_REG_XMM2(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm2) + #define UCONTEXT_REG_XMM3(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm3) + #define UCONTEXT_REG_XMM4(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm4) + #define UCONTEXT_REG_XMM5(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm5) + #define UCONTEXT_REG_XMM6(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm6) + #define UCONTEXT_REG_XMM7(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm7) + #define UCONTEXT_REG_XMM8(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm8) + #define UCONTEXT_REG_XMM9(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm9) + #define UCONTEXT_REG_XMM10(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm10) + #define UCONTEXT_REG_XMM11(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm11) + #define UCONTEXT_REG_XMM12(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm12) + #define UCONTEXT_REG_XMM13(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm13) + #define UCONTEXT_REG_XMM14(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm14) + #define UCONTEXT_REG_XMM15(ctx) (((ucontext_t*)(ctx))->uc_mcontext->__fs.__fpu_xmm15) #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) #define UCONTEXT_REG_RAX(ctx) (((ucontext_t*)(ctx))->uc_mcontext.mc_rax) #define UCONTEXT_REG_RBX(ctx) (((ucontext_t*)(ctx))->uc_mcontext.mc_rbx) @@ -229,7 +259,8 @@ typedef struct ucontext { #define UCONTEXT_REG_R14(ctx) (((ucontext_t*)(ctx))->sc_r14) #define UCONTEXT_REG_R15(ctx) (((ucontext_t*)(ctx))->sc_r15) #elif !defined(HOST_WIN32) -#define UCONTEXT_GREGS(ctx) ((guint64*)&(((ucontext_t*)(ctx))->uc_mcontext.gregs)) + #define UCONTEXT_GREGS(ctx) ((guint64*)&(((ucontext_t*)(ctx))->uc_mcontext.gregs)) + #define UCONTEXT_FREGS(ctx) (((ucontext_t*)(ctx))->uc_mcontext.fpregs->_xmm) #endif #ifdef UCONTEXT_GREGS @@ -252,6 +283,26 @@ typedef struct ucontext { #define UCONTEXT_REG_R15(ctx) (UCONTEXT_GREGS ((ctx)) [REG_R15]) #endif +#ifdef UCONTEXT_FREGS +#define UCONTEXT_REG_XMM +#define UCONTEXT_REG_XMM0(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM0]) +#define UCONTEXT_REG_XMM1(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM1]) +#define UCONTEXT_REG_XMM2(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM2]) +#define UCONTEXT_REG_XMM3(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM3]) +#define UCONTEXT_REG_XMM4(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM4]) +#define UCONTEXT_REG_XMM5(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM5]) +#define UCONTEXT_REG_XMM6(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM6]) +#define UCONTEXT_REG_XMM7(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM7]) +#define UCONTEXT_REG_XMM8(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM8]) +#define UCONTEXT_REG_XMM9(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM9]) +#define UCONTEXT_REG_XMM10(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM10]) +#define UCONTEXT_REG_XMM11(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM11]) +#define UCONTEXT_REG_XMM12(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM12]) +#define UCONTEXT_REG_XMM13(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM13]) +#define UCONTEXT_REG_XMM14(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM14]) +#define UCONTEXT_REG_XMM15(ctx) (UCONTEXT_FREGS ((ctx)) [AMD64_XMM15]) +#endif + #elif defined(__mono_ppc__) #if HAVE_UCONTEXT_H @@ -355,6 +406,27 @@ typedef struct ucontext { #define UCONTEXT_REG_R11(ctx) (((arm_ucontext*)(ctx))->sig_ctx.arm_fp) #define UCONTEXT_REG_R12(ctx) (((arm_ucontext*)(ctx))->sig_ctx.arm_ip) #define UCONTEXT_REG_CPSR(ctx) (((arm_ucontext*)(ctx))->sig_ctx.arm_cpsr) +#elif defined(__NetBSD__) + typedef ucontext_t arm_ucontext; + + #define UCONTEXT_REG_PC(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_PC]) + #define UCONTEXT_REG_SP(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_SP]) + #define UCONTEXT_REG_LR(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_LR]) + #define UCONTEXT_REG_R0(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R0]) + #define UCONTEXT_REG_R1(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R1]) + #define UCONTEXT_REG_R2(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R2]) + #define UCONTEXT_REG_R3(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R3]) + #define UCONTEXT_REG_R4(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R4]) + #define UCONTEXT_REG_R5(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R5]) + #define UCONTEXT_REG_R6(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R6]) + #define UCONTEXT_REG_R7(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R7]) + #define UCONTEXT_REG_R8(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R8]) + #define UCONTEXT_REG_R9(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R9]) + #define UCONTEXT_REG_R10(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R10]) + #define UCONTEXT_REG_R11(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R11]) + #define UCONTEXT_REG_R12(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_R12]) + #define UCONTEXT_REG_CPSR(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_CPSR]) + #define UCONTEXT_REG_VFPREGS(ctx) (((ucontext_t*)(ctx))->uc_mcontext.__gregs[_REG_VFPREGS]) #endif #elif defined(TARGET_ARM64)