X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=mono%2Futils%2Fmono-membar.h;h=60f6164dc4511921906c9076701ea86db707f50e;hb=fb3a6d1cd207f0289558c558ef188584ba8e4533;hp=dba12456794a9c5084d51ed2cd06f403a815cab1;hpb=579148e2d6655e5e6d4d5777c6e26f28a3fca101;p=mono.git diff --git a/mono/utils/mono-membar.h b/mono/utils/mono-membar.h index dba12456794..60f6164dc45 100644 --- a/mono/utils/mono-membar.h +++ b/mono/utils/mono-membar.h @@ -15,21 +15,35 @@ #include #ifdef _MSC_VER +#ifndef WIN32_LEAN_AND_MEAN +#define WIN32_LEAN_AND_MEAN +#endif +#include #include static inline void mono_memory_barrier (void) { + /* NOTE: _ReadWriteBarrier and friends only prevent the + compiler from reordering loads and stores. To prevent + the CPU from doing the same, we have to use the + MemoryBarrier macro which expands to e.g. a serializing + XCHG instruction on x86. Also note that the MemoryBarrier + macro does *not* imply _ReadWriteBarrier, so that call + cannot be eliminated. */ _ReadWriteBarrier (); + MemoryBarrier (); } static inline void mono_memory_read_barrier (void) { _ReadBarrier (); + MemoryBarrier (); } static inline void mono_memory_write_barrier (void) { _WriteBarrier (); + MemoryBarrier (); } #elif defined(USE_GCC_ATOMIC_OPS) static inline void mono_memory_barrier (void) @@ -42,74 +56,6 @@ static inline void mono_memory_read_barrier (void) mono_memory_barrier (); } -static inline void mono_memory_write_barrier (void) -{ - mono_memory_barrier (); -} -#elif defined(sparc) || defined(__sparc__) -static inline void mono_memory_barrier (void) -{ - __asm__ __volatile__ ("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" : : : "memory"); -} - -static inline void mono_memory_read_barrier (void) -{ - __asm__ __volatile__ ("membar #LoadLoad" : : : "memory"); -} - -static inline void mono_memory_write_barrier (void) -{ - __asm__ __volatile__ ("membar #StoreStore" : : : "memory"); -} -#elif defined(__s390__) -static inline void mono_memory_barrier (void) -{ - __asm__ __volatile__ ("bcr 15,0" : : : "memory"); -} - -static inline void mono_memory_read_barrier (void) -{ - mono_memory_barrier (); -} - -static inline void mono_memory_write_barrier (void) -{ - mono_memory_barrier (); -} -#elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) -static inline void mono_memory_barrier (void) -{ - __asm__ __volatile__ ("sync" : : : "memory"); -} - -static inline void mono_memory_read_barrier (void) -{ - mono_memory_barrier (); -} - -static inline void mono_memory_write_barrier (void) -{ - __asm__ __volatile__ ("eieio" : : : "memory"); -} - -#elif defined(__arm__) -static inline void mono_memory_barrier (void) -{ -#if defined(__native_client__) || defined(HAVE_ARMV7) - /* NaCl requires ARMv7 CPUs. */ - __asm__ __volatile__("dsb" : : : "memory"); -#elif defined(HAVE_ARMV6) - __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory"); -#else - /* No barrier required on pre-v6. */ -#endif -} - -static inline void mono_memory_read_barrier (void) -{ - mono_memory_barrier (); -} - static inline void mono_memory_write_barrier (void) { mono_memory_barrier (); @@ -129,33 +75,8 @@ static inline void mono_memory_write_barrier (void) { mono_memory_barrier (); } -#elif defined(__mips__) -static inline void mono_memory_barrier (void) -{ - __asm__ __volatile__ ("" : : : "memory"); -} - -static inline void mono_memory_read_barrier (void) -{ - mono_memory_barrier (); -} - -static inline void mono_memory_write_barrier (void) -{ - mono_memory_barrier (); -} -#elif defined(MONO_CROSS_COMPILE) -static inline void mono_memory_barrier (void) -{ -} - -static inline void mono_memory_read_barrier (void) -{ -} - -static inline void mono_memory_write_barrier (void) -{ -} +#else +#error "Don't know how to do memory barriers!" #endif #endif /* _MONO_UTILS_MONO_MEMBAR_H_ */